Patents by Inventor Hung-Shern Tsai

Hung-Shern Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8809950
    Abstract: A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in the first type substrate with the second type bar regions between the second type well region and the first type doped body region. The first type doped body region, the second type well region, and each of the second type bar regions are separated from each other by the first type substrate. The second type bar regions are inter-diffused to form a second type continuous region adjoining the second type well region. A second type heavily-doped region is formed in the second type well region.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: August 19, 2014
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Patent number: 8669149
    Abstract: A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in the first type substrate with the second type bar regions between the second type well region and the first type doped body region. The first type doped body region, the second type well region, and each of the second type bar regions are separated from each other by the first type substrate. The second type bar regions are inter-diffused to form a second type continuous region adjoining the second type well region. A second type heavily-doped region is formed in the second type well region.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: March 11, 2014
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Publication number: 20120231598
    Abstract: A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in the first type substrate with the second type bar regions between the second type well region and the first type doped body region. The first type doped body region, the second type well region, and each of the second type bar regions are separated from each other by the first type substrate. The second type bar regions are inter-diffused to form a second type continuous region adjoining the second type well region. A second type heavily-doped region is formed in the second type well region.
    Type: Application
    Filed: May 16, 2012
    Publication date: September 13, 2012
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Publication number: 20120223383
    Abstract: A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in the first type substrate with the second type bar regions between the second type well region and the first type doped body region. The first type doped body region, the second type well region, and each of the second type bar regions are separated from each other by the first type substrate. The second type bar regions are inter-diffused to form a second type continuous region adjoining the second type well region. A second type heavily-doped region is formed in the second type well region.
    Type: Application
    Filed: May 16, 2012
    Publication date: September 6, 2012
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Patent number: 8237239
    Abstract: A Schottky diode device is provided, including a p-type semiconductor structure. An n drift region is disposed over the p-type semiconductor structure, wherein the n drift region comprises first and second n-type doping regions having different n-type doping concentrations, and the second n-type doping region is formed with a dopant concentration greater than that in the first n-type doping region. A plurality of isolation structures is disposed in the second n-type doping region of the n drift region, defining an anode region and a cathode region. A third n-type doping region is disposed in the second n-type doping region exposed by the cathode region. An anode electrode is disposed over the first n-type doping region in the anode region. A cathode electrode is disposed over the third n-type doping region in the cathode region.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: August 7, 2012
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Huang-Lang Pai, Hung-Shern Tsai
  • Patent number: 8232596
    Abstract: A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in the first type substrate with the second type bar regions between the second type well region and the first type doped body region. The first type doped body region, the second type well region, and each of the second type bar regions are separated from each other by the first type substrate. The second type bar regions are inter-diffused to form a second type continuous region adjoining the second type well region. A second type heavily-doped region is formed in the second type well region.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: July 31, 2012
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Patent number: 8125028
    Abstract: Semiconductor devices for high voltage application are presented. A high power semiconductor device includes a first type doped semiconductor substrate and a second type doped epitaxial layer deposited thereon. A first type doped body region is disposed in the second type doped epitaxial layer. A heavily doped drain region is formed in the second type doped epitaxial layer and isolated from the first type doped body region with an isolation region and a channel. A second type deep heavily doped region extends from the heavily doped drain region to the semiconductor substrate. A pair of inversed type heavily doped source regions is disposed in the first type doped body region. A gate electrode is disposed overlying the channel with a dielectric layer interposed therebetween. The high power semiconductor device is isolated from the other semiconductor devices with a first type deep heavily doped region.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: February 28, 2012
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Hung-Shern Tsai, Geeng-Lih Lin, Wen-Jya Liang
  • Patent number: 8008687
    Abstract: An electrostatic discharge protection device including a substrate, a first doped region, a first gate electrode, a second doped region, a second gate electrode, and a third doped region is disclosed. The substrate has a first conductive type. The first doped region has a second conductive type and is formed in the substrate. The first gate electrode is formed on the substrate. The second doped region has the second conductive type and is formed in the substrate. A transistor is constituted by the first doped region, the first gate electrode, and the second doped region. The second gate electrode is formed on the substrate. The first and the second gate electrodes are separated. The third doped region has the first conductive type and is formed in the substrate. A discharge element is constituted by the first doped region, the second gate electrode, and the third doped region.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: August 30, 2011
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Publication number: 20110095391
    Abstract: A Schottky diode device is provided, including a p-type semiconductor structure. An n drift region is disposed over the p-type semiconductor structure, wherein the n drift region comprises first and second n-type doping regions having different n-type doping concentrations, and the second n-type doping region is formed with a dopant concentration greater than that in the first n-type doping region. A plurality of isolation structures is disposed in the second n-type doping region of the n drift region, defining an anode region and a cathode region. A third n-type doping region is disposed in the second n-type doping region exposed by the cathode region. An anode electrode is disposed over the first n-type doping region in the anode region. A cathode electrode is disposed over the third n-type doping region in the cathode region.
    Type: Application
    Filed: October 28, 2009
    Publication date: April 28, 2011
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Huang-Lang Pai, Hung-Shern Tsai
  • Patent number: 7875930
    Abstract: The invention provides a semiconductor structure. A first type body doped region is deposited on a first type substrate. A first type heavily-doped region having a finger portion with an enlarged end region is deposited on the first type body doped region. A second type well region is deposited on the first type substrate. A second type heavily-doped region is deposited on the second type well region. An isolation structure is deposited between the first type heavily-doped region and the second type heavily-doped region. A gate structure is deposited on the first type substrate between the first type heavily-doped region and the isolation structure.
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: January 25, 2011
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Hung-Shern Tsai
  • Publication number: 20100301385
    Abstract: An electrostatic discharge protection device including a substrate, a first doped region, a first gate electrode, a second doped region, a second gate electrode, and a third doped region is disclosed. The substrate has a first conductive type. The first doped region has a second conductive type and is formed in the substrate. The first gate electrode is formed on the substrate. The second doped region has the second conductive type and is formed in the substrate. A transistor is constituted by the first doped region, the first gate electrode, and the second doped region. The second gate electrode is formed on the substrate. The first and the second gate electrodes are separated. The third doped region has the first conductive type and is formed in the substrate. A discharge element is constituted by the first doped region, the second gate electrode, and the third doped region.
    Type: Application
    Filed: May 26, 2009
    Publication date: December 2, 2010
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Patent number: 7838931
    Abstract: High voltage semiconductor devices with Schottky diodes are presented. A high voltage semiconductor device includes an LDMOS device and a Schottky diode device. The LDMOS device includes a semiconductor substrate, a P-body region in a first region of the substrate, and an N-drift region in the second region of the substrate with a junction therebetween. A patterned isolation region defines an active region. An anode electrode is disposed on the P-body region. An N+-doped region is disposed in the N-drift region. A cathode electrode is disposed on the N+-doped region. The Schottky diode includes an N-drift region on the semiconductor substrate. The anode electrode is disposed on the N-drift region at the first region of the substrate. The N+-doped region is disposed on the N-drift region at the second region of the substrate. The cathode electrode is disposed on the N+-doped region.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: November 23, 2010
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Patent number: 7795083
    Abstract: The invention provides a method for forming a semiconductor structure. A plurality of first type well regions is formed in the first type substrate. A plurality of second type well regions and a plurality of second type bar doped regions are formed in the first type substrate by a doping process using a mask. The second type bar doped regions are diffused to form a second type continuous region by annealing. The second type continuous region is adjoined with the first type well regions. A second type dopant concentration of the second type continuous region is smaller than a second type dopant concentration of the second type bar doped regions. A second type source/drain region is formed in the second type well region.
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: September 14, 2010
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Hung-Shern Tsai, Shang-Hui Tu, Shin-Cheng Lin
  • Publication number: 20100207174
    Abstract: The invention provides a method for forming a semiconductor structure. A plurality of first type well regions is formed in the first type substrate. A plurality of second type well regions and a plurality of second type bar doped regions are formed in the first type substrate by a doping process using a mask. The second type bar doped regions are diffused to form a second type continuous region by annealing. The second type continuous region is adjoined with the first type well regions. A second type dopant concentration of the second type continuous region is smaller than a second type dopant concentration of the second type bar doped regions. A second type source/drain region is formed in the second type well region.
    Type: Application
    Filed: February 16, 2009
    Publication date: August 19, 2010
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hung-Shern Tsai, Shang-Hui Tu, Shin-Cheng Lin
  • Publication number: 20100207207
    Abstract: The invention provides a semiconductor structure. A first type body doped region is deposited on a first type substrate. A first type heavily-doped region having a finger portion with an enlarged end region is deposited on the first type body doped region. A second type well region is deposited on the first type substrate. A second type heavily-doped region is deposited on the second type well region. An isolation structure is deposited between the first type heavily-doped region and the second type heavily-doped region. A gate structure is deposited on the first type substrate between the first type heavily-doped region and the isolation structure.
    Type: Application
    Filed: February 16, 2009
    Publication date: August 19, 2010
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR
    Inventor: Hung-Shern Tsai
  • Publication number: 20100163989
    Abstract: A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in the first type substrate with the second type bar regions between the second type well region and the first type doped body region. The first type doped body region, the second type well region, and each of the second type bar regions are separated from each other by the first type substrate. The second type bar regions are inter-diffused to form a second type continuous region adjoining the second type well region. A second type heavily-doped region is formed in the second type well region.
    Type: Application
    Filed: April 17, 2009
    Publication date: July 1, 2010
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Publication number: 20100148253
    Abstract: High voltage semiconductor devices with Schottky diodes are presented. A high voltage semiconductor device includes an LDMOS device and a Schottky diode device. The LDMOS device includes a semiconductor substrate, a P-body region in a first region of the substrate, and an N-drift region in the second region of the substrate with a junction therebetween. A patterned isolation region defines an active region. An anode electrode is disposed on the P-body region. An N+-doped region is disposed in the N-drift region. A cathode electrode is disposed on the N+-doped region. The Schottky diode includes an N-drift region on the semiconductor substrate. The anode electrode is disposed on the N-drift region at the first region of the substrate. The N+-doped region is disposed on the N-drift region at the second region of the substrate. The cathode electrode is disposed on the N+-doped region.
    Type: Application
    Filed: April 17, 2009
    Publication date: June 17, 2010
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR
    Inventors: Shang-Hui Tu, Hung-Shern Tsai
  • Publication number: 20100087054
    Abstract: The invention provides a method for forming a deep well region of a power device, including: providing a substrate with a first sacrificial layer thereon; forming a first patterned mask layer on the first sacrificial layer exposing a first open region; performing a first doping process to the first open region to form a first sub-doped region; removing the first patterned mask layer and the first sacrificial layer; forming an epitaxial layer on the substrate; forming a second sacrificial layer on the epitaxial layer; forming a second patterned mask layer on the second sacrificial layer exposing a second open region; performing a second doping process to the second open region to form a second sub-doped region; removing the second patterned mask layer; performing an annealing process to make the first and the second sub-doped regions form a deep well region; and removing the second sacrificial layer.
    Type: Application
    Filed: November 25, 2008
    Publication date: April 8, 2010
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shanghui L. Tu, Hung-Shern Tsai, Jui-Chun Chang
  • Patent number: 7682955
    Abstract: The invention provides a method for forming a deep well region of a power device, including: providing a substrate with a first sacrificial layer thereon; forming a first patterned mask layer on the first sacrificial layer exposing a first open region; performing a first doping process to the first open region to form a first sub-doped region; removing the first patterned mask layer and the first sacrificial layer; forming an epitaxial layer on the substrate; forming a second sacrificial layer on the epitaxial layer; forming a second patterned mask layer on the second sacrificial layer exposing a second open region; performing a second doping process to the second open region to form a second sub-doped region; removing the second patterned mask layer; performing an annealing process to make the first and the second sub-doped regions form a deep well region; and removing the second sacrificial layer.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: March 23, 2010
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shanghui L. Tu, Hung-Shern Tsai, Jui-Chun Chang
  • Publication number: 20090261409
    Abstract: Semiconductor devices for high voltage application are presented. A high power semiconductor device includes a first type doped semiconductor substrate and a second type doped epitaxial layer deposited thereon. A first type doped body region is disposed in the second type doped epitaxial layer. A heavily doped drain region is formed in the second type doped epitaxial layer and isolated from the first type doped body region with an isolation region and a channel. A second type deep heavily doped region extends from the heavily doped drain region to the semiconductor substrate. A pair of inversed type heavily doped source regions is disposed in the first type doped body region. A gate electrode is disposed overlying the channel with a dielectric layer interposed therebetween. The high power semiconductor device is isolated from the other semiconductor devices with a first type deep heavily doped region.
    Type: Application
    Filed: November 5, 2008
    Publication date: October 22, 2009
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hung-Shern Tsai, Geeng-Lih Lin, Wen-Jya Liang