Patents by Inventor Hung-Shih Wang

Hung-Shih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Automated equal-resistance routing in compact pattern
    Patent number: 11941339
    Abstract: Described is technology for automatically generating a routing for an integrated circuit (IC) design. Information describing pin-pairs of an integrated circuit (IC) design is received. An initial routing of the IC design is determined by (i) defining connected wires between each pin-pair in the set of pin-pairs, and (ii) evaluating a target resistance for the pin-pair over the connected wires, wherein each connected wire is routed with other connected wires. A resistance adjustment is applied to adjust wire resistance of the connected wires of the initial routing. The resistance adjustment can be based on a square routing in response to a wire resistance being below the target resistance; or the resistance adjustment can be based on a multi-layer stacking in response to the wire resistance being above the target resistance. The routing is provided in patterns as generated by the initial routing and the resistance adjustment.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: March 26, 2024
    Assignee: Synopsys, Inc.
    Inventors: Linx Lin, Alex Tsai, Hung-Shih Wang
  • CONSTRAINT FILE-BASED NOVEL FRAMEWORK FOR NET-BASED CHECKING TECHNIQUE
    Publication number: 20220382955
    Abstract: Net-based checking of a circuit design includes obtaining a circuit design comprising a plurality of polygons. Further, a shape of a first polygon of the plurality of polygons, and a shape of a second polygon of the plurality of polygons is determined. The shape of the first polygon differs from a shape of the second polygon. Violations within the circuit design are detected based on a comparison of the first polygon with the second polygon.
    Type: Application
    Filed: May 31, 2022
    Publication date: December 1, 2022
    Inventors: Chao-Min WANG, Ru-Lin YANG, Cheng-Lin LEE, Yuan-Wen WANG, Hung-Shih WANG
  • Gateway model routing with slits on wires
    Patent number: 8990756
    Abstract: A computer-implemented method for routing at least one conductor includes generating the at least one conductor within a bounded region on a planar surface in accordance with a template, and placing at least one slit in the conductor when the conductor overlaps a specified region of the bounded region in accordance with a specified pattern.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: March 24, 2015
    Assignee: Synopsys Taiwan Co., Ltd.
    Inventors: Hsin-Po Wang, Song Yuan, Hung-Shih Wang
  • Gateway Model Routing with Slits on Wires
    Publication number: 20140143747
    Abstract: A computer-implemented method for routing at least one conductor includes generating the at least one conductor within a bounded region on a planar surface in accordance with a template, and placing at least one slit in the conductor when the conductor overlaps a specified region of the bounded region in accordance with a specified pattern.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 22, 2014
    Applicant: Synopsys Taiwan Co., LTD.
    Inventors: Hsin-Po Wang, Song Yuan, Hung-Shih Wang