Patents by Inventor Hung-Ta Huang
Hung-Ta Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240379321Abstract: A plasma flood gun includes a filament to emit first electrons based on a first filament current induced in the filament to heat the filament to a first temperature at a first time. The first electrons interact with an inert gas in an arc plasma chamber to generate a first plasma. A filament resistance meter measures a first filament resistance of the filament, in-situ, during generation of the first plasma. A filament current source adjusts, based on the first filament resistance, the first filament current induced in the filament at the first time to a second filament current induced in the filament at a second time to generate a second plasma in the arc plasma chamber at the second time.Type: ApplicationFiled: July 24, 2024Publication date: November 14, 2024Inventors: Kai-Yun Yang, Chen Chi Wu, Ching I Li, Min-Chang Ching, Hung-Ta Huang
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Patent number: 12125665Abstract: A plasma flood gun includes a filament to emit first electrons based on a first filament current induced in the filament to heat the filament to a first temperature at a first time. The first electrons interact with an inert gas in an arc plasma chamber to generate a first plasma. A filament resistance meter measures a first filament resistance of the filament, in-situ, during generation of the first plasma. A filament current source adjusts, based on the first filament resistance, the first filament current induced in the filament at the first time to a second filament current induced in the filament at a second time to generate a second plasma in the arc plasma chamber at the second time.Type: GrantFiled: May 12, 2022Date of Patent: October 22, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Kai-Yun Yang, Chen Chi Wu, Ching I Li, Min-Chang Ching, Hung-Ta Huang
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Publication number: 20230369009Abstract: A plasma flood gun includes a filament to emit first electrons based on a first filament current induced in the filament to heat the filament to a first temperature at a first time. The first electrons interact with an inert gas in an arc plasma chamber to generate a first plasma. A filament resistance meter measures a first filament resistance of the filament, in-situ, during generation of the first plasma. A filament current source adjusts, based on the first filament resistance, the first filament current induced in the filament at the first time to a second filament current induced in the filament at a second time to generate a second plasma in the arc plasma chamber at the second time.Type: ApplicationFiled: May 12, 2022Publication date: November 16, 2023Inventors: Kai-Yun Yang, Chen Chi Wu, Ching I Li, Min-Chang Ching, Hung-Ta Huang
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Publication number: 20210273009Abstract: A bonding pad structure comprises an interconnect layer, an isolation layer over the interconnect layer, a conductive pad, and one or more non-conducting stress-releasing structures. The conductive pad comprises a planar portion over the isolation layer, and one or more bridging portions extending through at least the isolation layer and to the interconnect layer for establishing electric contact therewith, wherein there is a trench in the one or more bridging portions. The one or more non-conducting stress-releasing structures are disposed between the isolation layer and the conductive pad. The trench is surrounded by one of the one or more non-conducting stress-releasing structures from a top view.Type: ApplicationFiled: May 17, 2021Publication date: September 2, 2021Inventors: Volume Chien, I-Chih Chen, Hsin-Chi Chen, Hung-Ta Huang, Ying-Hao Chen, Ying-Lang Wang
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Patent number: 11011566Abstract: A bonding pad structure comprises an interconnect layer, an isolation layer over the interconnect layer, a conductive pad, and one or more non-conducting stress-releasing structures. The conductive pad comprises a planar portion over the isolation layer, and one or more bridging portions extending through at least the isolation layer and to the interconnect layer for establishing electric contact therewith, wherein there is a trench in the one or more bridging portions. The one or more non-conducting stress-releasing structures are disposed between the isolation layer and the conductive pad. The trench is surrounded by one of the one or more non-conducting stress-releasing structures from a top view.Type: GrantFiled: February 1, 2016Date of Patent: May 18, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTDInventors: Volume Chien, I-Chih Chen, Hsin-Chi Chen, Hung-Ta Huang, Ying-Hao Chen, Ying-Lang Wang
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Patent number: 9728511Abstract: A semiconductor wafer includes a substrate, an integrated circuit and a die seal ring structure. The substrate is with a die region, a die seal ring region surrounding the die region and a scribe line region surrounding the die seal ring region. The substrate includes a first surface and a second surface opposite to the first surface, and periodic recesses within the first surface of the die seal ring region, the scribe line region or both the die seal ring region and the scribe line region. The integrated circuit is located on the first surface and the second surface of the die region. The die seal ring structure is located on the second surface of the die seal ring region. A semiconductor die is also provided.Type: GrantFiled: December 17, 2013Date of Patent: August 8, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsi-Jung Wu, Volume Chien, Ying-Lang Wang, Hsin-Chi Chen, Ying-Hao Chen, Hung-Ta Huang
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Publication number: 20160148967Abstract: A bonding pad structure comprises an interconnect layer, an isolation layer over the interconnect layer, a conductive pad, and one or more non-conducting stress-releasing structures. The conductive pad comprises a planar portion over the isolation layer, and one or more bridging portions extending through at least the isolation layer and to the interconnect layer for establishing electric contact therewith, wherein there is a trench in the one or more bridging portions. The one or more non-conducting stress-releasing structures are disposed between the isolation layer and the conductive pad. The trench is surrounded by one of the one or more non-conducting stress-releasing structures from a top view.Type: ApplicationFiled: February 1, 2016Publication date: May 26, 2016Inventors: Volume Chien, I-Chih Chen, Hsin-Chi Chen, Hung-Ta Huang, Ying-Hao Chen, Ying-Lang Wang
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Patent number: 9252180Abstract: A bonding pad structure for an image sensor device and a method of fabrication thereof. The image sensor device has a radiation-sensor region including a substrate and a radiation detection device, and a bonding pad region including the bonding pad structure. The bonding pad structure includes: an interconnect layer; an interlayer dielectric layer (IDL), both layers extending from under the substrate into the bonding pad region; an isolation layer formed on IDL; a conductive pad having a planar portion and one or more bridging portions extending perpendicularly from the planar portion, through the IDL and isolation layers, and to the interconnect layer; and a plurality of non-conducting stress-releasing structures disposed between the isolation layer and the conductive pad in such a way to adjoin its planar and the bridging portions together for releasing potential pulling stress applied thereon and preventing a conductive pad peeling.Type: GrantFiled: February 8, 2013Date of Patent: February 2, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Volume Chien, I-Chih Chen, Ying-Lang Wang, Hsin-Chi Chen, Ying-Hao Chen, Hung-Ta Huang
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Patent number: 9082617Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.Type: GrantFiled: December 17, 2013Date of Patent: July 14, 2015Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Yuan Su, Hung-Ta Huang, Ping-Hao Lin, Hung-Che Liao, Hung-Yu Chiu, Chao-Hsuan Pan, Wen-Tsung Chen, Chih-Ming Huang
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Publication number: 20150170985Abstract: A semiconductor wafer includes a substrate, an integrated circuit and a die seal ring structure. The substrate is with a die region, a die seal ring region surrounding the die region and a scribe line region surrounding the die seal ring region. The substrate includes a first surface and a second surface opposite to the first surface, and periodic recesses within the first surface of the die seal ring region, the scribe line region or both the die seal ring region and the scribe line region. The integrated circuit is located on the first surface and the second surface of the die region. The die seal ring structure is located on the second surface of the die seal ring region. A semiconductor die is also provided.Type: ApplicationFiled: December 17, 2013Publication date: June 18, 2015Applicant: Taiwan Semiconductor Manufacturing CO., LTD.Inventors: Hsi-Jung Wu, Volume Chien, Ying-Lang Wang, Hsin-Chi Chen, Ying-Hao Chen, Hung-Ta Huang
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Publication number: 20150171069Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.Type: ApplicationFiled: December 17, 2013Publication date: June 18, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Yuan SU, Hung-Ta HUANG, Ping-Hao LIN, Hung-Che LIAO, Hung-Yu CHIU, Chao-Hsuan PAN, Wen-Tsung CHEN, Chih-Ming HUANG
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Patent number: 8203533Abstract: A trackball module structure is provided. In the structure, a Hall IC is integrated in a flexible printed circuit, and the integrated structure and a trackball device are disposed on the base to be located. Afterwards, a lid is used to fix the integrated structure and the trackball device to form a module. The module is easy to be disposed on an electronic device. This not only solves the problem that the conventional trackball is hard to locate, but also prevents the ESD with the cooperation of a metal base and a metal lid.Type: GrantFiled: August 10, 2009Date of Patent: June 19, 2012Assignee: ASUSTek Computer Inc.Inventors: Hung-Ta Huang, Jen-You Hou, Tzung-Ye Wu
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Publication number: 20100053086Abstract: A trackball module structure is provided. In the structure, a Hall IC is integrated in a flexible printed circuit, and the integrated structure and a trackball device are disposed on the base to be located. Afterwards, a lid is used to fix the integrated structure and the trackball device to form a module. The module is easy to be disposed on an electronic device. This not only solves the problem that the conventional trackball is hard to locate, but also prevents the ESD with the cooperation of a metal base and a metal lid.Type: ApplicationFiled: August 10, 2009Publication date: March 4, 2010Inventors: Hung-Ta HUANG, Jen-You HOU, Tzung-Ye Wu
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Publication number: 20090308666Abstract: An anti-abrasion device for a stylus integrated with an antenna is applied to an electronic apparatus. The electronic apparatus includes a main body, the stylus, and a slot. The anti-abrasion device comprises an antenna-connecting unit, a switch unit and a blocking unit each of which is disposed in the main body, and the blocking unit is linked to the switch unit. When the stylus is inserted in the slot, the antenna-connecting unit touches the stylus; and when the switch unit is switched off, the blocking unit disconnects the stylus from the antenna-connecting unit.Type: ApplicationFiled: May 15, 2009Publication date: December 17, 2009Applicant: ASUSTEK COMPUTER INC.Inventors: Hung-Ta Huang, Ming-Chih Hsieh, Chung-Yuan Kuang, Tzung-Ye Wu
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Patent number: 7482983Abstract: An electronic apparatus comprising a housing, a metallic antenna and a printed circuit board is provided. The housing comprises a metallic front casing and an insulating rear casing. The metallic front casing has a display panel and a number of buttons. The insulating rear casing is buckled to the metallic front casing. The insulating rear casing has an outer surface. The metallic antenna is disposed on part of the outer surface. The printed circuit board is disposed in the housing. The printed circuit board is electronically connected to the metallic antenna, the display panel and the buttons.Type: GrantFiled: July 25, 2006Date of Patent: January 27, 2009Assignee: ASUSTek Computer Inc.Inventors: Arthur Chang, Hung-Ta Huang
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Publication number: 20080192440Abstract: A connection assembly for an electronic device includes a hollow sheath and a fastener. In this case, the hollow sheath has a head portion, an axle portion, and a fastening portion. The axle portion connects the head portion and the fastening portion, and the fastening portion has a through hole. The fastener is inserted into the hollow sheath and engaged tightly in the fastening portion. One end of the fastener against the inner bottom surface of the fastening portion.Type: ApplicationFiled: July 26, 2007Publication date: August 14, 2008Inventors: Ching-Chang Meng, Hung-Ta Huang
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Publication number: 20070057853Abstract: An electronic apparatus comprising a housing, a metallic antenna and a printed circuit board is provided. The housing comprises a metallic front casing and an insulating rear casing. The metallic front casing has a display panel and a number of buttons. The insulating rear casing is buckled to the metallic front casing. The insulating rear casing has an outer surface. The metallic antenna is disposed on part of the outer surface. The printed circuit board is disposed in the housing. The printed circuit board is electronically connected to the metallic antenna, the display panel and the buttons.Type: ApplicationFiled: July 25, 2006Publication date: March 15, 2007Inventors: Arthur Chang, Hung-Ta Huang
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Patent number: 7127158Abstract: A water sprayer and heater assembly for windshield wiper is disclosed to include a controller; a water container connected between a water supply pipe and a water spray tube at the windshield wiper, a water pressure switch electrically connected to the controller and set in communication between the water supply pipe and the water inlet of the water container, and an electric heater mounted in the water container and electrically connected to the controller and controllable by the controller to heat water in the water container when a flow of water passes from the water supply pipe through the water pressure switch into the water container.Type: GrantFiled: July 12, 2005Date of Patent: October 24, 2006Inventors: Jen-Yen Yen, Hung-Ta Huang
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Patent number: 6924215Abstract: A method of monitoring and adjusting the position of a wafer with respect to an ion beam including setting the position of a wafer holder so that a wafer to be held therein is positioned at a tilt angle of 45 degrees and a twist angle of 45 degrees with respect to the path of an ion beam; positioning a n-type wafer without screen oxide in the wafer holder; implanting boron species into a region of the wafer at 160 KeV and a dose level of 5.0×1013 atoms/cm2; periodically measuring the sheet resistivity of a implanted wafer and readjusting the wafer tilt angle when the sheet resistivity is greater than 30 ohms/square.Type: GrantFiled: May 29, 2002Date of Patent: August 2, 2005Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Hung-Ta Huang, Hsueh-Li Sun, Juinn-Jie Chang, Stanley Huang, Jih-Churng Twu, Tom Tseng
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Patent number: D503306Type: GrantFiled: November 10, 2003Date of Patent: March 29, 2005Inventor: Hung-Ta Huang