Abstract: A sub-Non-Uniform Memory Access (sub-NUMA) clustering fault resilient memory system includes an initialization subsystem that is coupled to a processing system and a memory system. The initialization subsystem determines that the processing system and the memory system are configured to provide a plurality of NUMA nodes, allocates a respective portion of the memory system to each of the plurality of NUMA nodes, and configures each respective portion of the memory system to mirror a mirrored subset of that respective portion of the memory system. Subsequently, respective data that is utilized by each of the plurality of NUMA nodes provided by the processing system and the memory system and that is stored in the mirrored subset of the respective portion of the memory system allocated to that NUMA node is mirrored in that respective portion of the memory system.

Abstract: A sub-Non-Uniform Memory Access (sub-NUMA) clustering fault resilient memory system includes an initialization subsystem that is coupled to a processing system and a memory system. The initialization subsystem determines that the processing system and the memory system are configured to provide a plurality of NUMA nodes, allocates a respective portion of the memory system to each of the plurality of NUMA nodes, and configures each respective portion of the memory system to mirror a mirrored subset of that respective portion of the memory system. Subsequently, respective data that is utilized by each of the plurality of NUMA nodes provided by the processing system and the memory system and that is stored in the mirrored subset of the respective portion of the memory system allocated to that NUMA node is mirrored in that respective portion of the memory system.

Abstract: A PPR memory location reporting system includes BIOS coupled to a non-volatile memory system and a volatile memory system. During boot operations, the BIOS identifies a memory location identifier in the non-volatile memory system for a memory location that is included in the volatile memory system and that is associated with PPR, performs PPR operations on the memory location, and determines that the PPR operations on the memory location have failed. In response to determining that the PPR operations on the memory location have failed, the BIOS stores the memory location identifier in a boot error report table that is configured for use by an operating system to prevent use of the memory location by the operating system, and reserves the memory location identifier in a memory map that is configured for use by the operating system to prevent use of the memory location by the operating system.

Abstract: An information handling system includes a plurality of persistent memory devices and a basic input/output system (BIOS). The BIOS begins a power-on self-test (POST) of the information handling system. During the POST, the BIOS may call a block input/output (I/O) driver to access a memory region within the first persistent memory device. The access of the memory region within the first persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device. The BIOS may determine whether blocks of the memory region contain bad memory locations. In response to the memory region containing bad memory locations, the BIOS may return a device error message without performing the access of the blocks of the memory region within the first persistent memory device and may boot to an operating system of the information handling system via another bootable device.

Abstract: A non-volatile dual in-line memory module (NVDIMM) instantiates first and second partitions of non-volatile memory. The first partition is reserved and is not accessible to an operating system, and the second partition is accessible to the operating system. A processor may generate information uniquely associated with an information handling system and write the information to the first partition.

Abstract: A virtual non-volatile memory system includes a BIOS coupled to a non-volatile storage system and a volatile memory system. The BIOS designates a portion of the volatile memory system as a virtual NVDIMM, reserves a portion of the non-volatile storage system for storing virtual NVDIMM data, reports the virtual NVDIMM to an operating system using an ACPI NFIT, and emulates an NVDIMM controller. When a virtual NVDIMM storage event occurs, the BIOS copies data from the portion of the volatile memory system designated as the virtual NVDIMM to the portion of the non-volatile storage system reserved for storing virtual NVDIMM data. When the BIOS subsequently determines that a virtual NVDIMM recovery event has occurred, it copies the data stored in the portion of the non-volatile storage system reserved for storing virtual NVDIMM data to the portion of the volatile memory system designated as the virtual NVDIMM.

Abstract: A virtual non-volatile memory system includes a BIOS coupled to a non-volatile storage system and a volatile memory system. The BIOS designates a portion of the volatile memory system as a virtual NVDIMM, reserves a portion of the non-volatile storage system for storing virtual NVDIMM data, reports the virtual NVDIMM to an operating system using an ACPI NFIT, and emulates an NVDIMM controller. When a virtual NVDIMM storage event occurs, the BIOS copies data from the portion of the volatile memory system designated as the virtual NVDIMM to the portion of the non-volatile storage system reserved for storing virtual NVDIMM data. When the BIOS subsequently determines that a virtual NVDIMM recovery event has occurred, it copies the data stored in the portion of the non-volatile storage system reserved for storing virtual NVDIMM data to the portion of the volatile memory system designated as the virtual NVDIMM.

Abstract: A PPR memory location reporting system includes BIOS coupled to a non-volatile memory system and a volatile memory system. During boot operations, the BIOS identifies a memory location identifier in the non-volatile memory system for a memory location that is included in the volatile memory system and that is associated with PPR, performs PPR operations on the memory location, and determines that the PPR operations on the memory location have failed. In response to determining that the PPR operations on the memory location have failed, the BIOS stores the memory location identifier in a boot error report table that is configured for use by an operating system to prevent use of the memory location by the operating system, and reserves the memory location identifier in a memory map that is configured for use by the operating system to prevent use of the memory location by the operating system.

Abstract: A PPR memory location reporting system includes BIOS coupled to a non-volatile memory system and a volatile memory system. During boot operations, the BIOS identifies a memory location identifier in the non-volatile memory system for a memory location that is included in the volatile memory system and that is associated with PPR, performs PPR operations on the memory location, and determines that the PPR operations on the memory location have failed. In response to determining that the PPR operations on the memory location have failed, the BIOS stores the memory location identifier in a boot error report table that is configured for use by an operating system to prevent use of the memory location by the operating system, and reserves the memory location identifier in a memory map that is configured for use by the operating system to prevent use of the memory location by the operating system.

Abstract: An information handling system includes a non-volatile dual in-line memory module (NVDIMM) and a processor. The NVDIMM instantiates first and second partitions of non-volatile memory. The first partition is reserved and is not accessible to an operating system instantiated on the information handling system. The second partition is accessible to the operating system. The first partition includes a first region and a second region. The processor boots the information handling system to configure the NVDIMM based upon information from the first region, detects an error associated with the NVDIMM, and writes information associated with the error to the second region.

Abstract: An information handling system includes a plurality of persistent memory devices and a basic input/output system (BIOS). The BIOS begins a power-on self-test (POST) of the information handling system. During the POST, the BIOS may call a block input/output (I/O) driver to access a memory region within the first persistent memory device. The access of the memory region within the first persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device. The BIOS may determine whether blocks of the memory region contain bad memory locations. In response to the memory region containing bad memory locations, the BIOS may return a device error message without performing the access of the blocks of the memory region within the first persistent memory device and may boot to an operating system of the information handling system via another bootable device.

Abstract: A non-volatile dual in-line memory module (NVDIMM) includes a Serial Presence Interface (SPI) read only memory (ROM) device, and a non-volatile memory device. A firmware updater stores a first firmware image for the NVDIMM to the SPI ROM device, and stores the firmware image to the non-volatile memory device.

Abstract: An information handling system includes a non-volatile dual in-line memory module (NVDIMM) and a processor. The NVDIMM instantiates first and second partitions of non-volatile memory. The first partition is reserved and is not accessible to an operating system instantiated on the information handling system. The second partition is accessible to the operating system. The first partition includes a first region and a second region. The processor boots the information handling system to configure the NVDIMM based upon information from the first region, detects an error associated with the NVDIMM, and writes information associated with the error to the second region.

Abstract: A non-volatile dual in-line memory module (NVDIMM) instantiates first and second partitions of non-volatile memory. The first partition is reserved and is not accessible to an operating system, and the second partition is accessible to the operating system. A processor may generate information uniquely associated with an information handling system and write the information to the first partition.