Abstract: A thin film transistor includes a bottom gate, a semiconductor layer, a top gate, a first auxiliary conductive pattern, a source, and a drain. The semiconductor layer includes a first semiconductor region, a second semiconductor region, a first heavily doped region, a second heavily doped region, a third heavily doped region, a first lightly doped region, a second lightly doped region, and a third lightly doped region. The first heavily doped region and the second heavily doped region are respectively located on two sides of the first semiconductor region. Two ends of the second semiconductor region are directly connected to the third heavily doped region and the third lightly doped region, respectively. The top gate is electrically connected to the bottom gate. The source and the drain are respectively electrically connected to the third heavily doped region and the second heavily doped region of the semiconductor layer.

Abstract: A pick-up structure of a memory device and a method of manufacturing the memory device are provided. The pick-up structure includes pick-up electrode stripes. Each pickup electrode stripe includes a main body portion in the peripheral pick-up region and an extending portion extending from the main body portion to the memory cell region. The extending portion is narrower than the main body portion. The sidewall surface of the extending portion is aligned with the sidewall surface of the main body portion.

Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.

Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.

Abstract: The present disclosure provides a sensing circuit, including a photo-sensing component, a first transistor, and a temperature-sensing component. The photo-sensing component is configured to receive a light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control circuit. The photo-sensing component and the first transistor are coupled in series between first and second nodes. The temperature-sensing component is coupled between the first and second nodes and is configured to generate a second current according to a temperature. The temperature-sensing component includes a channel structure, a first gate, a second gate, and a light-shielding structure. The channel structure is configured to transmit the second current.

Abstract: A semiconductor device includes a field effect transistor (FET). The FET includes a first channel, a first source and a first drain; a second channel, a second source and a second drain; and a gate structure disposed over the first and second channels. The gate structure includes a gate dielectric layer and a gate electrode layer. The first source includes a first crystal semiconductor layer and the second source includes a second crystal semiconductor layer. The first source and the second source are connected by an alloy layer made of one or more Group IV element and one or more transition metal elements. The first crystal semiconductor layer is not in direct contact with the second crystal semiconductor layer.

Abstract: Battery packs according to some embodiments of the present technology may include a longitudinal beam. The packs may include a plurality of battery cells disposed adjacent the longitudinal beam. Each battery cell may be characterized by a first surface, and a second surface opposite the first surface. Each battery cell may be characterized by a third surface extending vertically between the first surface and the second surface. The first surface may face the longitudinal beam, and battery terminals may extend from the third surface. Each battery cell may be characterized by a fourth surface opposite the third surface. The packs may include a lid coupled with the first surface of each battery cell of the plurality of battery cells. The packs may include a base coupled with the second surface of each battery cell of the plurality of battery cells.

Abstract: The present disclosure provides a sensing circuit, including a photo-sensing component, a first transistor, and a temperature-sensing component. The photo-sensing component is configured to receive a light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control circuit. The photo-sensing component and the first transistor are coupled in series between first and second nodes. The temperature-sensing component is coupled between the first and second nodes and is configured to generate a second current according to a temperature. The temperature-sensing component includes a channel structure, a first gate, a second gate, and a light-shielding structure. The channel structure is configured to transmit the second current.

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.

Abstract: A memory device that includes at least one memory cell is introduced. Each of the at least one memory cell is coupled to a bit line and a word line. Each of the at least one memory cell includes a memory element and a selector element, in which the memory element is configured to store data of the at least one memory cell. The selector element is coupled to the memory element in series and is configured to select the memory element for a read operation and amplify the data stored in the memory element in the read operation.

Abstract: A memory device is provided. The memory device includes a write pass-gate transistor, a read pass-gate transistor, a write word line, and a read word line. The write pass-gate transistor is disposed in a first layer. The read pass-gate transistor is disposed in a second layer above the first layer. The write word line is disposed in a metallization layer above the first layer and electrically coupled to the write pass-gate transistor through a write path. The read word line is disposed in the metallization layer and electrically coupled to the read pass-gate transistor through a read path. The write path is different from the read path.

Abstract: A device and method for isolating extracellular vesicles from biofluids is disclosed. A nanoporous silicon nitride membrane is provided with a tangential flow of biofluid. A pressure gradient through the nanoporous silicon nitride membrane facilitates capture of extracellular vesicles from the tangential flow vector of biofluid. Reversal of the pressure gradient results in the release of the extracellular vesicles for subsequent collection.

Abstract: The present disclosure relates to an integrated circuit. The integrated circuit has a plurality of bit-line stacks disposed over a substrate and respectively including a plurality of bit-lines stacked onto one another. A data storage structure is over the plurality of bit-line stacks and a selector is over the data storage structure. A word-line is over the selector. The selector is configured to selectively allow current to pass between the plurality of bit-lines and the word-line. The plurality of bit-line stacks include a first bit-line stack, a second bit-line stack, and a third bit-line stack. The first and third bit-line stacks are closest bit-line stacks to opposing sides of the second bit-line stack. The second bit-line stack is separated from the first bit-line stack by a first distance and is further separated from the third bit-line stack by a second distance larger than the first distance.

Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: A method of fabrication of a multi-gate semiconductor device that includes providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers. The plurality of the second type of epitaxial layers is oxidized in the source/drain region. A first portion of a first layer of the second type of epitaxial layers is removed in a channel region of the fin to form an opening between a first layer of the first type of epitaxial layer and a second layer of the first type of epitaxial layer. A portion of a gate structure is then formed in the opening.

Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a substrate and a gate structure. The substrate includes a fin. The fin includes a source region and a drain region spaced apart from the source region. The gate structure is located between the source region and the drain region. The gate structure includes a work function layer. The work function layer includes a compound of a metal material and a Group VIA material.

Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.

Abstract: An illumination system provides an illumination beam and includes a red light source, a green light source, a blue light source, a first supplementary light source, a first X-shaped light-splitting assembly, a first light-splitting element, and a light-uniforming element. The red light source provides a red beam. The green light source provides a green beam. The blue light source provides a blue beam. The first supplementary light source provides a first supplementary beam. The first X-shaped light-splitting assembly guides the first supplementary beam and the blue beam to the first light-splitting element. The first light-splitting element guides the red beam, the green beam, the blue beam, and the first supplementary beam to the light-uniforming element. The first supplementary beam is a red supplementary beam or a blue supplementary beam, and the illumination system includes at least five light-emitting elements. A projection apparatus including the above illumination system is also provided.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a fin disposed in a first region of the semiconductor device, channel members disposed in a second region of the semiconductor device and stacked in a vertical direction, first and second metal gates disposed on a top surface of the fin, a third metal gate wrapping around each of the channel members, a first implant region in the fin with a first conductivity type, and a second implant region in the fin with a second conductivity opposite the first conductivity type. The fin includes first and second type epitaxial layers alternatingly disposed in the vertical direction. The first and second type epitaxial layers have different material compositions. The first type epitaxial layers and the channel members have the same material composition.