Abstract: Within a plasma enhanced chemical vapor deposition (PECVD) method for forming within a microelectronic fabrication an epitaxial semiconductor layer comprising at least one of silicon and germanium, there is employed a reactant gas composition comprising: (1) at least one of a silicon source material and a germanium source material; and (2) an inert carrier gas. The inert carrier gas provides the epitaxial semiconductor layer with attenuated defects.

Abstract: Within a Czochralski method for fabricating a silicon substrate wafer which employs pulling a silicon monocrystal ingot from a silicon melt and slicing therefrom the silicon substrate wafer, at least one of: (1) the silicon melt has introduced therein a halogen getter material from an extrinsic source; and (2) the silicon substrate wafer is further treated with a plasma. In accord with the method, the silicon substrate wafer is provided with attenuated defects.

Abstract: Within a plasma enhanced chemical vapor deposition (PECVD) method for forming within a microelectronic fabrication an epitaxial semiconductor layer comprising at least one of silicon and germanium, there is employed a reactant gas composition comprising: (1) at least one of a silicon source material and a germanium source material; and (2) an inert carrier gas. The inert carrier gas provides the epitaxial semiconductor layer with attenuated defects.

Abstract: A method to fabricate a bonding pad structure including the following steps. A substrate having a top metal layer and a passivation layer overlying the top metal layer is provided. The top metal layer being electrically connected to a lower metal layer by at least one metal via within a metal via area. The substrate includes a low-k dielectric layer at least between the lower metal layer and the top metal layer. The passivation layer is etched within the metal via area to form a trench exposing at least a portion of the top metal layer. A patterned, extended bonding pad is formed over the etched passivation layer and lining the trench. The extended bonding pad having a portion that extends over a peripheral planar area of the substrate adjacent the trench not within the metal via area. A wire bond is bonded to the extended bonding pad at the peripheral planar area portion to form the bonding pad structure.

Abstract: A method to fabricate a bonding pad structure including the following steps. A substrate having a top metal layer and a passivation layer overlying the top metal layer is provided. The top metal layer being electrically connected to a lower metal layer by at least one metal via within a metal via area. The substrate includes a low-k dielectric layer at least between the lower metal layer and the top metal layer. The passivation layer is etched within the metal via area to form a trench exposing at least a portion of the top metal layer. A patterned, extended bonding pad is formed over the etched passivation layer and lining the trench. The extended bonding pad having a portion that extends over a peripheral planar area of the substrate adjacent the trench not within the metal via area. A wire bond is bonded to the extended bonding pad at the peripheral planar area portion to form the bonding pad structure.

Abstract: A process for forming a dual damascene opening, in a composite layer comprised with low k layers, to accommodate a dual damascene type, copper structure, has been developed. The process features the use of a silicon oxide layer, formed on the surfaces of the composite layer, exposed in the narrow diameter, via hole component of the dual damascene opening. The silicon oxide layer prevents via poisoning, or outgassing of amines or hydroxyls from the low k layers exposed in the via hole opening, that can evolve during a subsequent photolithographic development cycle, used to define the trench shape component of the dual damascene opening. The protective silicon oxide layer is conformally formed on the exposed-surfaces of the via hole component, via a liquid phase deposition procedure, performed at room temperature.

Abstract: Within a Czochralski method for fabricating a silicon substrate wafer which employs pulling a silicon monocrystal ingot from a silicon melt and slicing therefrom the silicon substrate wafer, at least one of: (1) the silicon melt has introduced therein a halogen getter material from an extrinsic source; and (2) the silicon substrate wafer is further treated with a plasma. In accord with the method, the silicon substrate wafer is provided with attenuated defects.