Abstract: A method of forming a three-dimensional (3D) memory device includes: forming, over a substrate, a layer stack having alternating layers of a first conductive material and a first dielectric material; forming trenches extending vertically through the layer stack from an upper surface of the layer stack distal from the substrate to a lower surface of the layer stack facing the substrate; lining sidewalls and bottoms of the trenches with a memory film; forming a channel material over the memory film, the channel material including an amorphous material; filling the trenches with a second dielectric material after forming the channel material; forming memory cell isolation regions in the second dielectric material; forming source lines (SLs) and bit lines (BLs) that extend vertically in the second dielectric material on opposing sides of the memory cell isolation regions; and crystallizing first portions of the channel material after forming the SLs and BLs.

Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.

Abstract: A test device uses a single probe to test plurality of pads of at least one chip, and includes a test circuit, a plurality of short-circuit elements and a plurality of probes. The plurality of short-circuit elements is formed in scribe lines around the at least one chip, where each of the plurality of short-circuit elements connects the plurality of pads, and the plurality of pads includes one testing pad and at least one non-testing pad. The plurality of probes receives a plurality of test signals generated by the at least one chip from the testing pad via the plurality of short-circuit elements, so the test circuit generates a test result according to the plurality of test signals.

Abstract: A radio frequency front end testing method and a radio frequency front end testing device are provided in the present disclosure. The radio frequency front end testing device includes a processing module, a first multiplexing module and a second multiplexing module. The radio frequency front end testing method includes the steps of: transmitting a radio frequency front end testing control signal; switching a plurality of output channel terminals of the first multiplexing module and the second multiplexing module, and providing a testing data signal and a radio frequency front end testing clock signal to a plurality of devices under test; and executing a test procedure on the devices under test based on the testing data signal and the radio frequency front end testing clock signal.

Abstract: A test device uses a single probe to test plurality of pads of at least one chip, and includes a test circuit, a plurality of short-circuit elements and a plurality of probes. The plurality of short-circuit elements is formed in scribe lines around the at least one chip, where each of the plurality of short-circuit elements connects the plurality of pads, and the plurality of pads includes one testing pad and at least one non-testing pad. The plurality of probes receives a plurality of test signals generated by the at least one chip from the testing pad via the plurality of short-circuit elements, so the test circuit generates a test result according to the plurality of test signals.

Abstract: An active probe card capable of improving testing bandwidth of a device under (DUT) test includes a printed circuit board; at least one probe needle, affixed to a first surface of the printed circuit board for probing the DUT; at least one connection member, electrically connected to the at least one probe needle; and an amplification circuit, formed on the printed circuit board and coupled to the at least one connection member for amplifying an input or output signal of the DUT.

Abstract: An integrated circuit (IC) testing interface capable of upgrading an automatic test equipment (ATE) for testing a semiconductor device includes at least one pin for receiving or transmitting at least a test signal to a tester of the automatic test equipment, a plurality of digitizers coupled to the at least one pin for generating a digital signal, a processing means coupled to the plurality of digitizers for processing the digital signal, and a connection unit for connecting the processing means with a computing device for transmitting an output signal from the processing means to the computing device, where the IC testing interface is disposed between the tester and a prober of the automatic test equipment.

Abstract: An active probe card capable of improving testing bandwidth of a device under (DUT) test includes a printed circuit board; at least one probe needle, affixed to a first surface of the printed circuit board for probing the DUT; at least one connection member, electrically connected to the at least one probe needle; and an amplification circuit, formed on the printed circuit board and coupled to the at least one connection member for amplifying an input or output signal of the DUT.

Abstract: An integrated circuit (IC) testing interface capable of upgrading an automatic test equipment (ATE) for testing a semiconductor device includes at least one pin for receiving or transmitting at least a test signal to a tester of the automatic test equipment, a plurality of digitizers coupled to the at least one pin for generating a digital signal, a processing means coupled to the plurality of digitizers for processing the digital signal, and a connection unit for connecting the processing means with a computing device for transmitting an output signal from the processing means to the computing device, where the IC testing interface is disposed between the tester and a prober of the automatic test equipment.

Abstract: A probe card includes at least two connection arrangements on a printed circuit board and a daughter board connected to the printed circuit board through one of the connection arrangements. The daughter board includes a plurality of cell modules, with each of the cell modules having a socket for receiving a device under test and each of the connection arrangements of the printed circuit board being connectable to each of predetermined daughter boards respectively.