Abstract: A semiconductor device, which comprises a semiconductor substrate, an epitaxial layer, first metal structures, first doped regions, second metal structures, second doped regions, a conductive layer and a Schottky layer. The epitaxial layer is disposed on the semiconductor substrate. The first metal structures are disposed in the epitaxial layer. The first metal structures extend along a first direction and have a first width in a second direction. The first doped regions are disposed in the epitaxial layer and extend from below each first metal structure to the sidewall of each first metal structure. The second metal structure is disposed in the epitaxial layer. The second metal structures extend along the first direction and have a second width in the second direction, wherein the first width is larger than the second width. The conductive layer is disposed under the semiconductor substrate, and the Schottky layer is disposed on the epitaxial layer.

Abstract: A system on a chip (SoC) with a Universal Asynchronous Receiver/Transmitter (UART) interface includes a UART interface circuit, a detection circuit, and a control circuit. The UART interface circuit includes: a plurality of UART signal pads for receiving and transmitting signals; and a UART voltage pad for receiving an external operating voltage. The detection circuit is configured to detect the magnitude of the external operating voltage and thereby generate a detection result. The control circuit is configured to determine setting of a supply voltage for the plurality of UART signal pads according to the detection result. The control circuit makes the setting of the supply voltage be compatible with the external operating voltage according to the detection result, wherein the external operating voltage is a lower first voltage or a higher second voltage, and the first lower voltage is equal to an internal device operating voltage of the SoC.

Abstract: An example computing device includes a flexible display coupled to a housing that includes a support plate having a first joint coupled to a first end of the support plate and a second joint coupled to a second end of the support plate. A slide module has a slot that guides a slide movement of the second joint along a path of movement within the slot as the support plate pivots about the first joint, where the support plate moves according to the first joint and the second joint to support at least the portion of the flexible display when the flexible display is unfolded and moves according to the first joint and the second joint to create a gap between at least a portion of the support plate and at least the portion of the flexible display when the flexible display is folded.

Abstract: A foldable device may include a foldable layer and a hinge mechanism. The hinge mechanism may include at least one gear module that provides for synchronized movement of the hinge mechanism about a central plane of the hinge mechanism. A lock module may be coupled the hinge mechanism. The lock module may include a cam and a plate including a plurality of recesses. The lock module may selectively lock the hinge mechanism, and the foldable device, in one of a plurality of positions, based on a position of the cam in one of the recesses.

Abstract: An example computing device includes a flexible display coupled to a housing that includes a support plate having a first joint coupled to a first end of the support plate and a second joint coupled to a second end of the support plate. A slide module has a slot that guides a linear slide movement of the second joint along a linear path of movement within the slot as the support plate pivots about the first joint, where the support plate moves according to the first joint and the second joint to support at least the portion of the flexible display when the flexible display is unfolded and moves according to the first joint and the second joint to create a gap between at least a portion of the support plate and at least the portion of the flexible display when the flexible display is folded.

Abstract: A foldable device may include a foldable layer and a hinge mechanism. The hinge mechanism may include at least one synchronizing module, at least one torsion module, and a cover module. The at least one synchronizing module may include a synchronizing gear assembly including a first linking gear in meshed engagement with a first rotating link, a second linking gear in meshed engagement with a second rotating link, and at least one intermediate gear in meshed engagement with the first linking gear and the second linking gear. The first rotating link may be coupled to a first housing of a computing device and the second rotating link may be coupled to a second housing of the computing device. The meshed engagement of the first and second rotating links may provide of synchronized, symmetric movement of the first and second housings about a central axis of the computing device.

Abstract: A semiconductor device, which comprises a semiconductor substrate, an epitaxial layer, first metal structures, first doped regions, second metal structures, second doped regions, a conductive layer and a Schottky layer. The epitaxial layer is disposed on the semiconductor substrate. The first metal structures are disposed in the epitaxial layer. The first metal structures extend along a first direction and have a first width in a second direction. The first doped regions are disposed in the epitaxial layer and extend from below each first metal structure to the sidewall of each first metal structure. The second metal structure is disposed in the epitaxial layer. The second metal structures extend along the first direction and have a second width in the second direction, wherein the first width is larger than the second width. The conductive layer is disposed under the semiconductor substrate, and the Schottky layer is disposed on the epitaxial layer.

Abstract: A system on a chip (SoC) with a Universal Asynchronous Receiver/Transmitter (UART) interface includes a UART interface circuit, a detection circuit, and a control circuit. The UART interface circuit includes: a plurality of UART signal pads for receiving and transmitting signals; and a UART voltage pad for receiving an external operating voltage. The detection circuit is configured to detect the magnitude of the external operating voltage and thereby generate a detection result. The control circuit is configured to determine setting of a supply voltage for the plurality of UART signal pads according to the detection result. The control circuit makes the setting of the supply voltage be compatible with the external operating voltage according to the detection result, wherein the external operating voltage is a lower first voltage or a higher second voltage, and the first lower voltage is equal to an internal device operating voltage of the SoC.

Abstract: A power supply circuit includes a first regulator and a second regulator. The first regulator is configured to generate a first output signal according to an input signal. A voltage value of the first output signal decreases according to the input signal and a first voltage threshold value at a power-off stage. The second regulator is configured to be enabled according to the first output signal to generate a second output signal according to the input signal. A voltage value of the second output signal decreases according to the input signal and a second voltage threshold value at the power-off stage. The second voltage threshold value is greater than the first voltage threshold value.

Abstract: An example computing device includes a flexible display coupled to a housing that includes a support plate having a first joint coupled to a first end of the support plate and a second joint coupled to a second end of the support plate. A slide module has a slot that guides a linear slide movement of the second joint along a linear path of movement within the slot as the support plate pivots about the first joint, where the support plate moves according to the first joint and the second joint to support at least the portion of the flexible display when the flexible display is unfolded and moves according to the first joint and the second joint to create a gap between at least a portion of the support plate and at least the portion of the flexible display when the flexible display is folded.

Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.

Abstract: The present invention discloses an AVS scanning method, wherein the AVS scanning method includes the steps of: mounting a system on chip (SoC) on a printed circuit board (PCB), and connecting the SoC to a storage unit; enabling the SoC to read a boot code from the storage unit, and executing the boot code to perform an AVS scanning operation on the SoC to determine a plurality of target supply voltages respectively corresponding to a plurality of operating frequencies of the SoC to establish an AVS look-up table; and storing the AVS look-up table into the SoC or the storage unit.

Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.

Abstract: A foldable device may include a foldable layer and a hinge mechanism. The hinge mechanism may include at least one gear module that provides for synchronized movement of the hinge mechanism about a central plane of the hinge mechanism. A lock module may be coupled the hinge mechanism. The lock module may include a cam and a plate including a plurality of recesses. The lock module may selectively lock the hinge mechanism, and the foldable device, in one of a plurality of positions, based on a position of the cam in one of the recesses.

Abstract: A power supply circuit includes a first regulator and a second regulator. The first regulator is configured to generate a first output signal according to an input signal. A voltage value of the first output signal decreases according to the input signal and a first voltage threshold value at a power-off stage. The second regulator is configured to be enabled according to the first output signal to generate a second output signal according to the input signal. A voltage value of the second output signal decreases according to the input signal and a second voltage threshold value at the power-off stage. The second voltage threshold value is greater than the first voltage threshold value.

Abstract: A foldable device may include a foldable layer and a hinge mechanism. The hinge mechanism may include at least one synchronizing module, at least one torsion module, and a cover module. The at least one synchronizing module may include a synchronizing gear assembly including a first linking gear in meshed engagement with a first rotating link, a second linking gear in meshed engagement with a second rotating link, and at least one intermediate gear in meshed engagement with the first linking gear and the second linking gear. The first rotating link may be coupled to a first housing of a computing device and the second rotating link may be coupled to a second housing of the computing device. The meshed engagement of the first and second rotating links may provide of synchronized, symmetric movement of the first and second housings about a central axis of the computing device.

Abstract: The present invention discloses an AVS scanning method, wherein the AVS scanning method includes the steps of: mounting a system on chip (SoC) on a printed circuit board (PCB), and connecting the SoC to a storage unit; enabling the SoC to read a boot code from the storage unit, and executing the boot code to perform an AVS scanning operation on the SoC to determine a plurality of target supply voltages respectively corresponding to a plurality of operating frequencies of the SoC to establish an AVS look-up table; and storing the AVS look-up table into the SoC or the storage unit.

Abstract: An electronic apparatus and a circuit board thereof are provided. The electronic apparatus includes a control device that can operate with the circuit board, and includes a ball pad array. The ball pad array includes a plurality of power ball pads and a plurality of ground ball pads, which are arranged in the same pad arrangement region. At least a portion of the power ball pads and at least a portion of the ground ball pads are arranged in an alternate manner. The circuit board includes a solder pad array corresponding to the ball pad array of the control device so as to be disposed with the control device.

Abstract: A control device and a circuit board are provided. The control device can operate with the circuit board, and includes a ball pad array. The ball pad array includes a plurality of power ball pads and a plurality of ground ball pads, which are arranged in the same pad arrangement region. At least a portion of the power ball pads and at least a portion of the ground ball pads are arranged in an alternate manner. The circuit board includes a solder pad array corresponding to the ball pad array of the control device so as to be disposed with the control device.

Abstract: A keyboard testing machine for testing a keyboard of an electronic apparatus is provided. The keyboard testing machine includes a rack, a fixing base, and a pressing module. The fixing base is operatively connected to the rack and located over the electronic apparatus. The pressing module is located over the keyboard and includes a drive shaft, a rotating member, and a pressing assembly. The drive shaft is rotatably disposed on the fixing base. The rotating member is sleeved onto the drive shaft and has a cam portion. The pressing assembly is operatively connected to the fixing base and the cam portion. When the drive shaft rotates together with the rotating member, the cam portion drives the pressing assembly to linearly move relative to the fixing base, so as to make the pressing assembly cyclically press the keyboard.