Abstract: A physical analysis method, a sample for physical analysis and a preparing method thereof are provided. The preparing method of the sample for physical analysis includes: providing a sample to be inspected; and forming a contrast enhancement layer on a surface of the sample to be inspected. The contrast enhancement layer includes a plurality of first material layers and a plurality of second material layers stacked upon one another. The first material layer and the second material layer are made of different materials. Each one of the first and second material layers has a thickness that does not exceed 0.1 nm. In an image captured by an electron microscope, a difference between an average grayscale value of a surface layer image of the sample to be inspected and an average grayscale value of an image of the contrast enhancement layer is at least 50.

Abstract: A button module is provided. The button module comprises a base, a pressing part, and an elastic part. The pressing part includes a fixed end and a free end. The fixed end is pivotally connected to the base in a first axial direction. The elastic part is disposed on a side of the pressing part facing the base. The elastic part includes a first damping portion and a second damping portion selectively pressing against the base, where a hardness of the first damping portion is different from a hardness of the second damping portion.

Abstract: A sample analyzing method and a sample preparing method are provided. The sample analyzing method includes a sample preparing step, a placing step, and an analyzing step. The sample preparing step includes an obtaining step implemented by obtaining an identification information; and a marking and placing step implemented by placing a sample carrying component having a sample disposed thereon into a marking equipment, allowing the marking equipment to utilize the identification information to form an identification structure on the sample carrying component, and placing the sample carrying component into one of the accommodating slots according to the identification information. The placing step is implemented by taking out the sample carrying component from one of the accommodating slots and placing the sample carrying component into an electron microscope equipment. The analyzing step is implemented by utilizing the electron microscope equipment to photograph the sample to generate an analyzation image.

Abstract: Disclosed herein are related to a memory system including unit storage circuits. In one aspect, each of the unit storage circuits abuts an adjacent one of the unit storage circuits. In one aspect, each of the unit storage circuits includes a first group of memory cells, a second group of memory cells, a first sub-word line driver to apply a first control signal to the first group of memory cells through a first sub-word line extending along a direction, and a second sub-word line driver to apply a second control signal to the second group of memory cells through a second sub-word line extending along the direction. In one aspect, the memory system includes a common word line driver abutting one of the unit storage circuits and configured to apply a common control signal to the unit storage circuits through a word line extending along the direction.

Abstract: An object detection method and an electronic apparatus are provided. A processor is configured to perform the following. An original image is received. A plurality of initial feature layers of different scales is extracted from the original image. A plurality of fused feature layers of different scales is obtained through an interpolation and an addition operation based on the initial feature layers. The fused feature layers are respectively input into corresponding detection heads to obtain a bounding box location probability distribution through a bounding box regression branch of the detection head and obtain a classification probability distribution through a classification branch of the detection head.

Abstract: A management circuit is coupled to multiple processor cores for performing current suppression. The management circuit includes a detection circuit and a throttle signal generator. The detection circuit is operative to receive an activity signal from each processor core, and estimate a total current consumed by the plurality of processor cores based on activity signals. The activity signal indicates a current index proportional to current consumption of the processor core in a given time period. The throttle signal generator is operative to assert or de-assert throttle signals to the processor cores, one processor core at a time, based on one or more metrics calculated from the total current.

Abstract: In one example, an electronic device housing may include a metal substrate defining an opening and a shock absorber in-mold molded with the metal substrate. Further, shock absorber may include a supporting portion formed on a surface of the metal substrate and a protruding portion that extends from the supporting portion through the opening. Further, the electronic device housing may include a metal layer disposed on the supporting portion.

Abstract: A biological sorting apparatus is disclosed, which includes a light-induced dielectrophoretic chip, a supporting platform, an injecting unit and a projection module. The light-induced dielectrophoretic chip is configured to generate an internal electric field to perform sorting on a fluid including first microparticles and second microparticles. The supporting platform is utilized to support the light-induced dielectrophoretic chip thereon and has an opening. The injecting unit is configured to inject the fluid into the light-induced dielectrophoretic chip. The projection module is disposed below the supporting platform and is configured to project a light pattern onto a projection area of the light-induced dielectrophoretic chip through the opening of the supporting platform, such that the light-induced dielectrophoretic chip produces a light-induced effect to change the internal electric field, thereby sorting out the first microparticles and the second microparticles.

Abstract: A cell sorting method includes: obtaining a cervical sample of a pregnant mammal, the cervical sample including placental trophoblast cells and cervical cells; removing the mucus of the cervical sample; dispersing the placental trophoblast cells and the cervical cells; centrifuging the cervical sample to remove the supernatant of the cervical sample; and using a dielectrophoretic chip to perform sorting on the cervical sample, so as to sort out the placental trophoblast cells from the cervical cells.

Abstract: A light source module for microparticles sorting performed in a light-induced dielectrophoresis chip is provided, which includes a light emitting element, a control unit and a light converting unit. The light emitting element is configured to generate and emit light. The control unit is configured to generate a driving signal based on image data. The Light converting unit is coupled to the control unit, and is configured to convert the light into a light pattern based on the driving signal. A luminous exitance of the light converting unit is between 9×104 lux and 1.2×105 lux.

Abstract: A light induced dielectrophoresis (LIDEP) includes a LIDEP chip, a patterned light source, and an opaque cartridge. The LIDEP chip includes a first electrode layer, a second electrode layer, a semiconductor layer, and a flow channel layer. The flow channel layer defines a first channel, a second channel and a third channel intersected at a confluence. The first channel is configured to guide a liquid. The flow channel layer further defines a projection region including the confluence. The patterned light source is configured to project a patterned light on the projection region for guiding the first micro-particles and the second micro-particles located within the confluence to move toward the second channel and the third channel, respectively. The opaque cartridge covers the LIDEP chip and has an opening. The vertical projection of the opening overlaps the projection region.

Abstract: A panel laminating method is provided with the following steps. A transparent adhesive layer is formed on a first panel. At least a portion of the transparent adhesive layer is pre-cured to increase the viscosity of the transparent adhesive layer. After the transparent adhesive layer is pre-cured, a second panel is stacked on the transparent adhesive layer. After the second panel is stacked on the transparent adhesive layer, the entire of the transparent adhesive layer is main-cured so that the second panel is laminated to the first panel through the transparent adhesive layer. Besides, a panel assembly and an electronic device are also provided.

Abstract: A light source module for microparticles sorting performed in a light-induced dielectrophoresis chip is provided, which includes a light emitting element, a control unit and a light converting unit. The light emitting element is configured to generate and emit light. The control unit is configured to generate a driving signal based on image data. The Light converting unit is coupled to the control unit, and is configured to convert the light into a light pattern based on the driving signal. A luminous exitance of the light converting unit is between 9×104 lux and 1.2 ×105 lux.

Abstract: A light induced dielectrophoresis (LIDEP) device is configured to perform a sorting process on a liquid including plural first micro-particles and plural second micro-particles. The LIDEP device includes a LIDEP chip and an opaque cartridge. The LIDEP chip includes a first electrode layer, a second electrode layer, a semiconductor layer, and a flow channel layer. The flow channel layer defines a first channel, a second channel and a third channel intersected at a confluence. The first channel is configured to guide the liquid. The flow channel layer further defines a projection region including the confluence. A patterned light source is projected on the projection region, thereby guiding the first micro-particles and the second micro-particles located within the confluence to move toward the second channel and the third channel, respectively. The opaque cartridge covers the LIDEP chip and has an opening. The vertical projection of the opening overlaps the projection region.

Abstract: A depth processing apparatus includes a depth buffer, an early depth processing circuit, a post depth processing circuit, and a depth processing controller. The depth buffer stores depth information of a plurality of pixels of a screen space. The early depth processing circuit performs early depth processing based on at least a portion of the depth information before a pixel shading stage. The post depth processing circuit performs post depth processing based on at least a portion of the depth information after the pixel shading stage. The depth processing controller manages a plurality of dependency indication values corresponding to a plurality of sub-regions in the screen space, respectively, and configured to control a first pixel for undergoing at least one of the early depth processing and the post depth processing by referring a first dependency indication value of a first sub-region in which the first pixel is located.

Abstract: A biological sorting apparatus is disclosed, which includes a light-induced dielectrophoretic chip, a supporting platform, an injecting unit and a projection module. The light-induced dielectrophoretic chip is configured to generate an internal electric field to perform sorting on a fluid including first microparticles and second micropartides. The supporting platform is utilized to support the light-induced dielectrophoretic chip thereon and has an opening. The injecting unit is configured to inject the fluid into the light-induced dielectrophoretic chip. The projection module is disposed below the supporting platform and is configured to project a light pattern onto a projection area of the light-induced dielectrophoretic chip through the opening of the supporting platform, such that the light-induced dielectrophoretic chip produces a light-induced effect to change the internal electric field, thereby sorting out the first microparticles and the second microparticles.

Abstract: A depth processing method and associated graphic processing circuit is provided. The method comprises loading geometry data of a scene and performing a vertex transformation thereof. After the geometry data is segmented in a tile resolution, pre-depth data of the scene are obtained. After the geometry data are segmented in a bin resolution, plural bin tables are generated. Then, the plural bin tables are converted into plural tiles, the plural converted tiles are classified into a first portion of tiles and a second portion of tiles according to depth data of the converted tiles and the pre-depth data of the scene, and the second portion of tiles are discarded. After the first portion of tiles are processed, a color value and a depth value of each pixel of the scene are generated.

Abstract: A graphics processing system includes a decision logic and a varying buffer control circuit. The decision logic sets a control signal by checking at least one criterion, wherein the at least one criterion includes a first criterion, and a checking result of the first criterion depends on a size of a primitive. The varying buffer control circuit refers to the control signal to determine whether to store varying variables of the primitive into a varying buffer.

Abstract: A graphics processing method and an associated graphics processing apparatus, where the graphics processing method is applied to the graphics processing apparatus, the graphics processing apparatus may be positioned within an electronic device, and the graphics processing apparatus may comprise at least one portion of the electronic device. The graphics processing method includes the steps of: calculating vertex positions of a primitive in a binning phase; determining, according to specific information, whether to compute vertex varyings of the primitive in the binning phase or in a rendering phase so as to provide a determination result; computing the vertex varyings in the binning phase or in the rendering phase according to the determination result; and rendering the primitive according to the vertex positions and the vertex varyings in the rendering phase.

Abstract: Disclosure is a biosensor chip having precise count function comprising: a substrate, a plurality of ground wire waveguide layers, a signal waveguide layer and a protective layer. Wherein, the plurality of ground wire waveguide layers are located on two sides of the substrate, the signal waveguide layer is located on the substrate and between the plurality of ground wire waveguide layers, wherein the signal waveguide layer has a recess which forms a cell sensing region; and the protective layer covers a portion of the ground wire waveguide layers and a portion of the signal waveguide layer to expose the recess.