Patents by Inventor Hung-Yi Liu

Hung-Yi Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124689
    Abstract: A resin composition includes resin and inorganic filler. The resin includes liquid rubber resin, polyphenylene ether resin, and a crosslinking agent. Compared to a total of 100 parts by mass of the resin, the usage amount of the inorganic filler is at least greater than or equal to 40 parts by mass.
    Type: Application
    Filed: November 14, 2022
    Publication date: April 18, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Hung-Yi Chang, Chia-Lin Liu
  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240101485
    Abstract: A powder composition includes a first powder, a second powder, and a modified functional group. A particle size range of the first powder is between 1 micron and 100 microns. The second powder and the modified functional group are modified on the first powder. A particle size range of the second powder is between 10 nanometers and 1 micron. A manufacturing method of a powder composition is also provided.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 28, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Hung-Yi Chang, Chia-Lin Liu
  • Patent number: 11932534
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 11920036
    Abstract: A rubber resin material with high dielectric constant and a metal substrate with high dielectric constant are provided. The rubber resin material with high dielectric constant includes a rubber resin composition with high dielectric constant and inorganic fillers. The rubber resin composition with high dielectric constant includes: 40 wt % to 70 wt % of a liquid rubber, 10 wt % to 30 wt % of a polyphenylene ether resin, and 20 wt % to 40 wt % of a crosslinker. A molecular weight of the liquid rubber ranges from 800 g/mol to 6000 g/mol. A dielectric constant of the rubber resin material with high dielectric constant is higher than or equal to 2.0.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: March 5, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Hung-Yi Chang, Chien-Kai Wei, Chia-Lin Liu
  • Patent number: 10789400
    Abstract: A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: September 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Publication number: 20180322226
    Abstract: A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.
    Type: Application
    Filed: July 18, 2018
    Publication date: November 8, 2018
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Patent number: 10083268
    Abstract: A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: September 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Patent number: 10002221
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: June 19, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Patent number: 9934344
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Publication number: 20170177752
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Application
    Filed: March 9, 2017
    Publication date: June 22, 2017
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Publication number: 20170109456
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Application
    Filed: December 28, 2016
    Publication date: April 20, 2017
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Patent number: 9619602
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Publication number: 20170083639
    Abstract: A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.
    Type: Application
    Filed: November 16, 2016
    Publication date: March 23, 2017
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Publication number: 20170083659
    Abstract: A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.
    Type: Application
    Filed: September 22, 2015
    Publication date: March 23, 2017
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Patent number: 9600623
    Abstract: A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: March 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Patent number: 9582627
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Publication number: 20160147916
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Application
    Filed: December 29, 2014
    Publication date: May 26, 2016
    Inventors: Hung-Yi Liu, Matthew M. Ziegler
  • Publication number: 20160147932
    Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.
    Type: Application
    Filed: June 23, 2015
    Publication date: May 26, 2016
    Inventors: Hung-Yi Liu, Matthew M. Ziegler