Abstract: A vacuum battery structural assembly and a vacuum multi-cell battery module composed thereof are provided and include a first repeating unit including a first frame plate and a second frame plate with respect to the first frame plate; and an electrolyte channel defined within the first frame plate and the second frame plate to accommodate a liquid electrolyte, wherein both a surface of the first frame plate and a surface of the second frame plate include a vacuum suction area, the vacuum suction area includes a vacuum aperture and a vacuum channel, wherein the vacuum aperture is formed on at least one surface of the first frame plate and the second frame plate, the vacuum channel is positioned inside the first frame plate and the second frame plate, and is configured to generate a longitudinal pressing suction force and seal the first frame plate and the second frame plate.

Abstract: An analog-to-digital converter including analog-to-digital converting units connected in serial. The current comparator includes a current input terminal to receive a sampling current, a reference current input terminal to receive a reference current and a bit output terminal for outputting a bit signal. The current operation circuit includes a current output terminal for outputting a compared current according to the sampling current and the reference current. The operation controlling terminal selects the compared current according to the bit signal. The controlling terminal receives a clock signal to latch the bit signal. The analog-to-digital converting units output the bit signals in sequence in a period of the clock signal.

Abstract: An analog-to-digital converter including analog-to-digital converting units connected in serial. The current comparator includes a current input terminal to receive a sampling current, a reference current input terminal to receive a reference current and a bit output terminal for outputting a bit signal. The current operation circuit includes a current output terminal for outputting a compared current according to the sampling current and the reference current. The operation controlling terminal selects the compared current according to the bit signal. The controlling terminal receives a clock signal to latch the bit signal. The analog-to-digital converting units output the bit signals in sequence in a period of the clock signal.