Patents by Inventor Hung Wei Lin

Hung Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136440
    Abstract: A thin film transistor and method of making the same, the thin film transistor including: a substrate; a word line disposed on the substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region disposed between the source and drain regions and overlapping with the word line in a vertical direction perpendicular to a plane of the substrate; a hydrogen diffusion barrier layer overlapping with the channel region in the vertical direction; a gate dielectric layer disposed between the channel region and the word line; and source and drain electrodes respectively electrically coupled to the source and drain regions.
    Type: Application
    Filed: December 30, 2023
    Publication date: April 25, 2024
    Inventors: Hung-Wei Li, Yu-Ming Lin, Mauricio Manfrini, Sai-Hooi Yeong
  • Patent number: 11966546
    Abstract: A display device includes a base layer, a touch sensing layer, a light guide module and a display panel. The touch sensing layer is disposed on the base layer. The light guide module is disposed on the touch sensing layer. The touch sensing layer is located between the light guide module and the display panel, and the touch sensing layer and one of the light guide module and the display panel have no adhesive material therebetween.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: April 23, 2024
    Assignee: E Ink Holdings Inc.
    Inventors: Chen-Cheng Lin, Chia-I Liu, Kun-Hsien Lee, Hung-Wei Tseng
  • Publication number: 20240127754
    Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 18, 2024
    Inventors: Chin-Wei Lin, Hung Sheng Lin, Shih Chang Chang, Shinya Ono
  • Patent number: 11963295
    Abstract: Provided are a circuit apparatus, a manufacturing method thereof, and a circuit system. The circuit apparatus includes a flexible circuit board, a flexible packaging material layer and an electronic device. The flexible circuit board has at least one hollow pattern, wherein the flexible circuit board has an inner region and a peripheral region surrounding the inner region, and has a first surface and a second surface opposite to each other. The flexible packaging material layer is disposed in the at least one hollow pattern. The electronic device is disposed on the first surface of the flexible circuit board and electrically connected with the flexible circuit board.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hung-Hsien Ko, Yi-Cheng Lu, Heng-Yin Chen, Hao-Wei Yu, Te-Hsun Lin
  • Patent number: 11955298
    Abstract: A button module is provided. The button module comprises a base, a pressing part, and an elastic part. The pressing part includes a fixed end and a free end. The fixed end is pivotally connected to the base in a first axial direction. The elastic part is disposed on a side of the pressing part facing the base. The elastic part includes a first damping portion and a second damping portion selectively pressing against the base, where a hardness of the first damping portion is different from a hardness of the second damping portion.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: April 9, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Te-Wei Huang, Zih-Siang Huang, Jhih-Wei Rao, Hung-Chieh Wu, Liang-Jen Lin
  • Patent number: 11953523
    Abstract: An analog front-end (AFE) circuit, configured to be coupled to a sensor having a plurality of sensing units, includes a plurality of sensing circuits and a plurality of multiplexers. Each of the plurality of multiplexers is coupled between one of the plurality of sensing units and at least two of the plurality of sensing circuits.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 9, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Tzu-Wei Lin, Hung-Kai Chen, Feng-Lin Chan
  • Publication number: 20240107777
    Abstract: An SOT MRAM structure includes a word line. A second source/drain doping region and a fourth source/drain doping region are disposed at the same side of the word line. A first conductive line contacts the second source/drain doping region. A second conductive line contacts the fourth source/drain doping region. The second conductive line includes a third metal pad. A memory element contacts an end of the first conductive line. A second SOT element covers and contacts a top surface of the memory element. The third metal pad covers and contacts part of the top surface of the second SOT element.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 28, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Wei Kuo, Hung-Chan Lin, Chung-Yi Chiu
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Patent number: 11935841
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 19, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Meng-Wei Hsieh, Yu-Pin Tsai
  • Publication number: 20240084445
    Abstract: A leak check is performed on a semiconductor wafer processing tool that includes a process chamber and process gas lines, and a semiconductor wafer is processed using the semiconductor wafer processing tool if the leak check passes. Each gas line includes a mass flow controller (MFC) and normally closed valves including an upstream and downstream valves upstream and downstream of the MFC. Leak checking includes: leak checking up to the downstream valves of the gas lines with the upstream valves closed and the downstream valves of the gas lines closed; and leak checking up to the upstream valve of each the process gas line with the upstream valves of the of the process gas lines closed and with the downstream valve of the of the process gas line being leak checked open and the downstream valve of every other process gas line closed.
    Type: Application
    Filed: January 4, 2023
    Publication date: March 14, 2024
    Inventors: Chih-Wei Chou, Yuan-Hsin Chi, Chih-Hao Yang, Hung-Chih Wang, Yu-Chi Liu, Sheng-Yuan Lin
  • Publication number: 20240088291
    Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240088246
    Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Ling Hsu, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Patent number: 11923459
    Abstract: A thin film transistor and method of making the same, the thin film transistor including: a substrate; a word line disposed on the substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region disposed between the source and drain regions and overlapping with the word line in a vertical direction perpendicular to a plane of the substrate; a hydrogen diffusion barrier layer overlapping with the channel region in the vertical direction; a gate dielectric layer disposed between the channel region and the word line; and source and drain electrodes respectively electrically coupled to the source and drain regions.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Hung Wei Li, Mauricio Manfrini, Sai-Hooi Yeong, Yu-Ming Lin
  • Publication number: 20240071947
    Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Yu-Ling Tsai, Lai Wei Chih, Meng-Tsan Lee, Hung-Pin Chang, Li-Han Hsu, Chien-Chia Chiu, Cheng-Hung Lin
  • Publication number: 20230406445
    Abstract: A power module of an electric assisted bicycle is disclosed and includes a pedal shaft, a gear-plate-output shaft, a reducer, a motor, a first sensor, a housing, a second sensor and a driving controller. The gear-plate-output, a reducer-output shaft and a reducer-fixed shaft of the reducer are disposed in parallel and sleeved on the pedal shaft concentrically. The motor drives the gear-plate-output shaft to rotate. The first sensor is disposed on the reducer-fixed shaft for sensing a first torque of the reducer-output shaft acting on the reducer-fixed shaft. The reducer-fixed shaft is connected to the housing. A frameset-fastening component protrudes outwardly from the housing, and is configured to fix the power module on the frameset. The second sensor is disposed on the frameset-fastening component for sensing a second torque of the power module acting on the frameset. The driving controller controls the motor in accordance with the second torque and the first torque.
    Type: Application
    Filed: August 3, 2022
    Publication date: December 21, 2023
    Inventors: Hung-Wei Lin, Yu-Xian Huang, Li-Chi Wu, Chi-Wen Chung
  • Publication number: 20230412045
    Abstract: A speed-reducer-and-motor all-on-one machine is disclosed and includes a connection shaft, a motor and a speed reducer. The connection shaft includes a first section, a second section and an accommodation space. The first section and the second section are arranged in an axial direction. The accommodation space is in communication between a front end and a rear end of the connection shaft. An elliptical cam is formed on an outer surface of the second section of the connection shaft. An outer diameter of the first section is greater than a major axis length of the elliptical cam. The motor is received within the accommodation space and connected to an inner surface of the first section. The speed reducer is connected to the outer surface of the second section.
    Type: Application
    Filed: April 19, 2023
    Publication date: December 21, 2023
    Inventors: Chi-Wen Chung, Hung-Wei Lin, Fu-Kuang Yang, Shu-Hsiang Yang, Tzu-Min Yi
  • Publication number: 20230141065
    Abstract: A speed reducer comprises a transmission shaft, an eccentric wheel, a first wheel assembly, a rotating wheel and a second wheel assembly. The first wheel assembly comprises a first wheel disc and at least one first roller. The at least one first roller is disposed on the inner wall of first wheel disc. The rotating wheel comprises a main body comprising an outer ring structure and a concave structure. The outer ring structure comprises at least one first tooth. The at least one first tooth is in contact with the corresponding first roller. At least one second roller is disposed within the concave structure. The second wheel assembly comprises a second wheel disc and at least one second tooth. The at least one second tooth is disposed on an outer periphery of the second wheel assembly. The at least one second tooth is in contact with the corresponding second roller.
    Type: Application
    Filed: January 4, 2023
    Publication date: May 11, 2023
    Inventors: Chi-Wen Chung, En-Yi Chu, Hung-Wei Lin, Ming-Li Tsao
  • Publication number: 20230099907
    Abstract: A power module of an electric assisted bicycle is disclosed and includes a pedal shaft, a gear-plate-output shaft, a reducer-output shaft and a motor-output shaft. The pedal shaft is arranged along an axial direction. The gear-plate-output shaft includes a first section and a second section arranged in the axial direction. The first section is concentrically sleeved on the pedal shaft through a first one-way bearing along a radial direction. When the pedal shaft is forced to rotate, the gear-plate-output shaft is driven through the first one-way bearing. The reducer-output shaft is concentrically sleeved on an outer surface of the second section through a second one-way bearing along the radial direction. The motor-output shaft is concentrically sleeved on the reducer-output shaft along the radial direction. When the motor-output shaft drives the reducer-output shaft to rotate, the gear-plate-output shaft is driven by the reducer-output shaft through the second one-way bearing.
    Type: Application
    Filed: May 9, 2022
    Publication date: March 30, 2023
    Inventors: Chi-Wen Chung, Hung-Wei Lin, Chien-Ping Huang
  • Patent number: 11578789
    Abstract: A speed reducer comprises a transmission shaft, an eccentric wheel, a first wheel assembly, a rotating wheel and a second wheel assembly. The first wheel assembly comprises a first wheel disc and at least one first roller. The at least one first roller is disposed on the inner wall of first wheel disc. The rotating wheel comprises a main body comprising an outer ring structure and a concave structure. The outer ring structure comprises at least one first tooth. The at least one first tooth is in contact with the corresponding first roller. At least one second roller is disposed within the concave structure. The second wheel assembly comprises a second wheel disc and at least one second tooth. The at least one second tooth is disposed on an outer periphery of the second wheel assembly. The at least one second tooth is in contact with the corresponding second roller.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: February 14, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chi-Wen Chung, En-Yi Chu, Hung-Wei Lin, Ming-Li Tsao
  • Publication number: 20230044229
    Abstract: A battery header cap and an assembly method thereof are provided, and the battery header cap includes a battery, a battery header, an insulating sleeve, and a header cap. The battery includes a battery body and a battery case, and the battery case has a header groove near a case opening. The battery header is disposed at the case opening, and the insulating sleeve completely covers the metal surface of the battery header cap. The header cap includes an electrode plane and a sidewall, the electrode plane has a header cap opening to expose the metal electrode, the electrode plane is disposed on the insulating sleeve, the sidewall covers the end of the battery case, and the end of the sidewall is embedded into the header groove. The structure provides support and insulating protection for the header and also enhances the sealability of the case.
    Type: Application
    Filed: August 9, 2022
    Publication date: February 9, 2023
    Inventors: HUNG-WEI LIN, PIN-HUNG HSU, GUAN-YU CHEN, GUO-CHEN HUANG