Patents by Inventor HUNGWEI LU

HUNGWEI LU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory utilizing bundle-level status values and bundle status circuits
    Patent number: 9478314
    Abstract: An integrated circuit memory includes a memory array, including a plurality of data lines. A buffer structure is coupled to the plurality of data lines, including a plurality of storage elements to store bit-level status values for the plurality of data lines. The memory includes logic to indicate bundle-level status values of corresponding bundles of storage elements in the buffer structure based on the bit-level status values of bits in the corresponding bundles. A plurality of bundle status circuits is arranged in a daisy chain and coupled to respective bundles in the buffer structure, producing an output of the daisy chain indicating detection of a bundle in the first status. Control circuitry executes cycles to determine the output of the daisy chain, each cycle clearing a bundle status circuit indicating the first status if the output indicates detection of a bundle in the first status in the cycle.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: October 25, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Hungwei Lu, Wei-An Lai, Shuo-Nan Hung, Chi Lo
  • MEMORY UTILIZING BUNDLE-LEVEL STATUS VALUES AND BUNDLE STATUS CIRCUITS
    Publication number: 20160077153
    Abstract: An integrated circuit memory includes a memory array, including a plurality of data lines. A buffer structure is coupled to the plurality of data lines, including a plurality of storage elements to store bit-level status values for the plurality of data lines. The memory includes logic to indicate bundle-level status values of corresponding bundles of storage elements in the buffer structure based on the bit-level status values of bits in the corresponding bundles. A plurality of bundle status circuits is arranged in a daisy chain and coupled to respective bundles in the buffer structure, producing an output of the daisy chain indicating detection of a bundle in the first status. Control circuitry executes cycles to determine the output of the daisy chain, each cycle clearing a bundle status circuit indicating the first status if the output indicates detection of a bundle in the first status in the cycle.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 17, 2016
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: HUNGWEI LU, WEI-AN LAI, SHOU-NAN HUNG, CHI LO