Abstract: A 3-D package structure for isolated power module is discussed. The package structure has metal trace in a support layer (e.g. a substrate board), which is covered by two magnetic films from both sides, thus an effective transformer is formed. An IC die which contains a voltage regulator is stacked above the support layer, which significantly reduces the package size.

Abstract: A 3-D package structure for isolated power module is discussed. The package structure has metal trace in a support layer (e.g. a substrate board), which is covered by two magnetic films from both sides, thus an effective transformer is formed. An IC die which contains a voltage regulator is stacked above the support layer, which significantly reduces the package size.

Abstract: A multi-die package structure with an embedded die embedded in a substrate, and a flip chip die mounted above the substrate is discussed. The package is compact and low cost.

Abstract: A multi-die package structure with an embedded die embedded in a substrate, a flip chip die mounted above the substrate, and an attached die attached onto the flip chip die. The package is compact and low cost.

Abstract: A multi-die co-packed module with an embedded die embedded in a substrate, an electrical component mounted above the substrate, and a flip chip die placed between the substrate and the electrical component or below the substrate. The package is compact and low cost.

Abstract: A multi-die package structure with an embedded die embedded in a substrate, a high flip chip die mounted above the substrate, and a low flip chip die placed below the substrate. The package is compact and low cost.

Abstract: A method for producing a circuit board having an integrated electronic component comprising providing a circuit board substrate having a first substrate surface and a second substrate surface, securing an integrated electronic component to the first substrate surface, and disposing a first dielectric layer on the first substrate surface and over the first integrated electronic component. The method additionally includes disposing a metallic layer on the first dielectric layer to produce an integrated electronic component assembly, producing in the integrated electronic component assembly at least one via having a metal lining in contact with the metallic layer, and disposing a second dielectric layer over the via and over the metallic layer.