Abstract: A sputter deposition system includes a mobile collimator. The collimator can be magnetically moved into and out of a position between a wafer and a target of material to be sputtered onto the wafer. In addition, magnets are used to levitate the collimator so that it can be removed without solid-solid friction, and the contamination it can cause. The magnets used for levitation are part of a control loop that maintains the orientation of the collimator parallel to the wafer. The system allows for a combination of good deposition step coverage and high fabrication throughput while minimizing opportunities for contamination and breakage that can occur when the wafer is transferred between chambers.

Abstract: A method of forming a metal interconnect structure for a CMOS integrated circuit provides for deposition of via metal prior to formation of an intermetal dielectric. After a submetal dielectric is deposited, lower metal and via metals are deposited. Gradient photolithography is used to define a via pattern and a lower metal pattern in a positive photoresist. After etching, the lower metal assumes the lower metal pattern and the via metal assumes the via pattern. A three-layer intermetal dielectric includes a spin-on glass sandwiched between two deposited silicon dioxide layers. The resulting structure is polished until at least some of the vias are exposed. Other vias can be exposed by via apertures that are define photolithographically. An upper metal layer is then deposited, filling the via apertures. The upper metal is then patterned to complete the interconnect structure. This method provides that via metal is insulated from spin-on glass moisture by the deposited oxide.