Patents by Inventor Huong Thanh Nguyen
Huong Thanh Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7244672Abstract: A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing fluorocarbon gas. The hydrogen-containing fluorocarbon gas may be used to selectively etch an organosilicate layer formed on a silicon oxide stop etch layer when fabricating a damascene structure.Type: GrantFiled: March 9, 2005Date of Patent: July 17, 2007Assignee: Applied Materials, Inc.Inventors: Huong Thanh Nguyen, Michael Scott Barnes, Li-Qun Xia, Mehul Naik
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Patent number: 7183201Abstract: A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing fluorocarbon gas. The hydrogen-containing fluorocarbon gas may be used to selectively etch an organosilicate layer formed on a silicon oxide stop etch layer when fabricating a damascene structure.Type: GrantFiled: July 23, 2001Date of Patent: February 27, 2007Assignee: Applied Materials, Inc.Inventors: Huong Thanh Nguyen, Michael Scott Barnes, Li-Qun Xia, Mehul Naik
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Patent number: 7097716Abstract: A method of cleaning a plasma etching reactor is provided. The method of cleaning a plasma etching reactor includes generating one or more plasmas from oxygen gas and a hydrogen-containing gas, and exposing interior surfaces of the reactor to the plasma(s) from the oxygen-gas and the hydrogen-containing gas. The cleaning method is used to remove deposited material, such as deposits containing fluorine, carbon, oxygen, and hydrogen from interior surfaces of the reactor. The hydrogen-containing gas may contribute to the cleaning method by providing a source of hydrogen that removes fluorine from the surfaces of the reactor.Type: GrantFiled: October 17, 2002Date of Patent: August 29, 2006Assignee: Applied Materials, Inc.Inventors: Michael Barnes, Huong Thanh Nguyen
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Patent number: 6939434Abstract: A plasma reactor is described that includes a vacuum chamber defined by an enclosure including a side wall and a workpiece support pedestal within the chamber defining a processing region overlying said pedestal. The chamber has at least a first pair of ports near opposing sides of said processing region and a first external reentrant tube is connected at respective ends thereof to the pair of ports. The reactor further includes a process gas injection apparatus (such as a gas distribution plate) and an RF power applicator coupled to the reentrant tube for applying plasma source power to process gases within the tube to produce a reentrant torroidal plasma current through the first tube and across said processing region. A magnet controls radial distribution of plasma ion density in the processing region, the magnet having an elongate pole piece defining a pole piece axis intersecting the processing region.Type: GrantFiled: June 5, 2002Date of Patent: September 6, 2005Assignee: Applied Materials, Inc.Inventors: Kenneth S. Collins, Hiroji Hanawa, Yan Ye, Kartik Ramaswamy, Andrew Nguyen, Michael S. Barnes, Huong Thanh Nguyen
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Publication number: 20050158667Abstract: A photoresist or a residue of the photoresist may by removed by the hydrogen and water plasma mixture. The process may be performed at a temperature range between about 150° C. and about 450° C., preferably about 250° C., and a power range between about 500 W and about 3000 W, preferably about 1400 W.Type: ApplicationFiled: January 20, 2004Publication date: July 21, 2005Inventors: Huong Thanh Nguyen, Mark Naoshi Kawaguchi, Mehul Naik, Li-Qun Xia, Ellie Yieh
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Publication number: 20040077511Abstract: A method of cleaning a plasma etching reactor is provided. The method of cleaning a plasma etching reactor includes generating one or more plasmas from oxygen gas and a hydrogen-containing gas, and exposing interior surfaces of the reactor to the plasma(s) from the oxygen-gas and the hydrogen-containing gas. The cleaning method is used to remove deposited material, such as deposits containing fluorine, carbon, oxygen, and hydrogen from interior surfaces of the reactor. The hydrogen-containing gas may contribute to the cleaning method by providing a source of hydrogen that removes fluorine from the surfaces of the reactor.Type: ApplicationFiled: October 17, 2002Publication date: April 22, 2004Applicant: Applied Materials, Inc.Inventors: Michael Barnes, Huong Thanh Nguyen
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Patent number: 6680164Abstract: A photoresist or a residue of the photoresist may by removed by the hydrogen and water plasma mixture. The process may be performed at a temperature range between about 150° C. and about 450° C., preferably about 250° C., and a power range between about 500 W and about 3000 W, preferably about 1400 W.Type: GrantFiled: November 30, 2001Date of Patent: January 20, 2004Assignee: Applied Materials Inc.Inventors: Huong Thanh Nguyen, Mark Naoshi Kawaguchi, Mehul B. Naik, Li-Qun Xia, Ellie Yieh
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Publication number: 20030226641Abstract: A plasma reactor is described that includes a vacuum chamber defined by an enclosure including a side wall and a workpiece support pedestal within the chamber defining a processing region overlying said pedestal. The chamber has at least a first pair of ports near opposing sides of said processing region and a first external reentrant tube is connected at respective ends thereof to the pair of ports. The reactor further includes a process gas injection apparatus (such as a gas distribution plate) and an RF power applicator coupled to the reentrant tube for applying plasma source power to process gases within the tube to produce a reentrant torroidal plasma current through the first tube and across said processing region. A magnet controls radial distribution of plasma ion density in the processing region, the magnet having an elongate pole piece defining a pole piece axis intersecting the processing region.Type: ApplicationFiled: June 5, 2002Publication date: December 11, 2003Applicant: Applied Materials, Inc.Inventors: Kenneth S. Collins, Hiroji Hanawa, Yan Ye, Kartik Ramaswamy, Andrew Nguyen, Michael S. Barnes, Huong Thanh Nguyen
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Publication number: 20030219988Abstract: A method is described for decreasing the critical dimensions of integrated circuit features in which a first masking layer (101) is deposited, patterned and opened in the manner of typical feature etching, and a second masking layer (201) is deposited thereon prior to etching the underlying insulator. The second masking layer is advantageously coated in a substantially conformal manner. Opening the second masking layer while leaving material of the second layer on the sidewalls of the first masking layer as spacers leads to reduction of the feature critical dimension in the underlying insulator. Ashable masking materials, including amorphous carbon and organic materials are removable without CMP, thereby reducing costs. Favorable results are also obtained utilizing more than one masking layer (101, 301) underlying the topmost masking layer (302) from which the spacers are formed. Embodiments are also described in which slope etching replaces the addition of a separate spacer layer.Type: ApplicationFiled: May 22, 2002Publication date: November 27, 2003Applicant: Applied Materials, Inc.Inventors: Hongqing Shan, Kenny L. Doan, Jingbao Liu, Michael S. Barnes, Huong Thanh Nguyen, Christopher Dennis Bencher, Christopher S. Ngai, Wendy H. Yeh, Eda Tuncel, Claes H. Bjorkman
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Publication number: 20030194510Abstract: One embodiment of the present invention is a method used to fabricate devices on a substrate, which method is utilized at a stage of processing wherein a dummy gate that includes gate electrode material and gate dielectric material is exposed, which method includes steps of: (a) flowing one or more gases into a plasma generator disposed outside a processing chamber containing the substrate; and (b) flowing output from the plasma generator into the processing chamber so that the substrate is exposed to species that selectively etch the gate electrode material.Type: ApplicationFiled: April 16, 2002Publication date: October 16, 2003Applicant: Applied Materials, Inc.Inventors: Huong Thanh Nguyen, Michael Barnes
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Publication number: 20030194496Abstract: Methods are provided for depositing a low dielectric constant material. In one aspects, a method is provided for depositing a low dielectric constant material including introducing a processing gas comprising hydrogen and an oxygen-containing organosilicon compound, an oxygen-free organosilicon compound, or combinations thereof, to a substrate surface in a processing chamber and reacting the processing gas at processing conditions to deposit the low dielectric constant material on the substrate surface, wherein the low k dielectric material comprises at least silicon and carbon. The processing gas may further include an inert gas, a meta-stable compound, or combinations thereof. The method may further include treating the low dielectric constant material with a hydrogen containing plasma, annealing the deposited low dielectric constant material, or combinations thereof.Type: ApplicationFiled: April 11, 2002Publication date: October 16, 2003Applicant: Applied Materials, Inc.Inventors: Ping Xu, Li-Qun Xia, Huong Thanh Nguyen, Louis Yang
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Publication number: 20030104320Abstract: A photoresist or a residue of the photoresist may by removed by the hydrogen and water plasma mixture. The process may be performed at a temperature range between about 150° C. and about 450° C., preferably about 250° C., and a power range between about 500 W and about 3000 W, preferably about 1400 W.Type: ApplicationFiled: November 30, 2001Publication date: June 5, 2003Applicant: Applied Materials, Inc.Inventors: Huong Thanh Nguyen, Mark Naoshi Kawaguchi, Mehul B. Naik, Li-Qun Xia, Ellie Yieh
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Patent number: 6569257Abstract: A method for cleaning silicon carbide and/or organosilicate layers from interior surfaces of a process chamber is disclosed. In one aspect, silicon carbide and/or organosilicate layers are cleaned from interior surfaces of a process chamber by treating it with a hydrogen/fluorine-based plasma. In another aspect, silicon carbide and/or organosilicate layer are cleaned from interior surfaces of the process chamber by treating it with a hydrogen-based plasma followed by a fluorine-based plasma. Alternatively, silicon carbide and/or organosilicate layers are cleaned from interior surfaces of the chamber by treating it with a fluorine-based plasma followed by a hydrogen-based plasma.Type: GrantFiled: November 9, 2000Date of Patent: May 27, 2003Assignee: Applied Materials Inc.Inventors: Huong Thanh Nguyen, Michael Barnes, Li-Qun Xia, Ellie Yieh
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Patent number: 6521546Abstract: A method of forming an integrated circuit using a fluoro-organosilicate layer is disclosed. The fluoro-organosilicate layer is formed by applying an electric field to a gas mixture comprising a fluoro-organosilane compound and an oxidizing gas. The fluoro-organosilicate layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the fluoro-organosilicate layer is used as a hardmask. In another integrated circuit fabrication process, the fluoro-organosilicate layer is incorporated into a damascene structure.Type: GrantFiled: June 14, 2000Date of Patent: February 18, 2003Assignee: Applied Materials, Inc.Inventors: Michael Barnes, Hichem M'Saad, Huong Thanh Nguyen, Farhad Moghadam
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Patent number: 6514850Abstract: Methods of forming an interface in a dielectric material to act as an indicator for terminating an etching process, and products produced thereby.Type: GrantFiled: January 31, 2001Date of Patent: February 4, 2003Assignee: Applied Materials, Inc.Inventors: Li-Qun Xia, Huong Thanh Nguyen, Ellie Yieh, Dan Maydan
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Patent number: 6511920Abstract: A method of forming an optical marker layer for etch endpoint determination in integrated circuit fabrication processes is disclosed. The optical marker layer is used in conjunction with organic and/or carbon-containing material layers that are used as bulk insulating materials and barrier materials. The optical marker layer is formed on the bulk insulating material layer and/or the barrier material layer by incorporating an optical marker into the surface thereof. The optical marker is incorporated into the surface of the bulk insulating material layer and/or the barrier material layer by treating such layer with an optical marker-containing gas. The optical marker layer provides an optical marker emission spectrum when it is etched during a subsequent patterning step.Type: GrantFiled: June 14, 2001Date of Patent: January 28, 2003Assignee: Applied Materials, Inc.Inventors: Huong Thanh Nguyen, Yunsang Kim, Ellie Yieh, Li-Qun Xia
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Publication number: 20030017694Abstract: A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing fluorocarbon gas. The hydrogen-containing fluorocarbon gas may be used to selectively etch an organosilicate layer formed on a silicon oxide stop etch layer when fabricating a damascene structure.Type: ApplicationFiled: July 23, 2001Publication date: January 23, 2003Applicant: Applied Materials, Inc.Inventors: Huong Thanh Nguyen, Michael Scott Barnes, Li-Qun Xia, Mehul Naik
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Publication number: 20020192845Abstract: A method of forming an optical marker layer for etch endpoint determination in integrated circuit fabrication processes is disclosed. The optical marker layer is used in conjunction with organic and/or carbon-containing material layers that are used as bulk insulating materials and barrier materials. The optical marker layer is formed on the bulk insulating material layer and/or the barrier material layer by incorporating an optical marker into the surface thereof. The optical marker is incorporated into the surface of the bulk insulating material layer and/or the barrier material layer by treating such layer with an optical marker-containing gas. The optical marker layer provides an optical marker emission spectrum when it is etched during a subsequent patterning step.Type: ApplicationFiled: June 14, 2001Publication date: December 19, 2002Inventors: Huong Thanh Nguyen, Yunsang Kim, Ellie Yieh, Li-Qun Xia
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Publication number: 20020102856Abstract: Methods of forming an interface in a dielectric material to act as an indicator for terminating an etching process, and products produced thereby.Type: ApplicationFiled: January 31, 2001Publication date: August 1, 2002Applicant: Applied Materials, Inc.Inventors: Li-Qun Xia, Huong Thanh Nguyen, Ellie Yieh, Dan Maydan
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Patent number: 6258735Abstract: The present invention provides a method of depositing a carbon doped silicon oxide film having a low dielectric constant (k). The concentration of oxygen is controlled to produce soft plasma conditions inside the chamber while a precursor gas is diverted through a bypass to stabilize the precursor gas flow prior to routing the precursor into the chamber and using a back to back plasma deposition scheme.Type: GrantFiled: October 5, 2000Date of Patent: July 10, 2001Assignee: Applied Materials, Inc.Inventors: Li-qun Xia, Tian-hoe Lim, Huong Thanh Nguyen, Dian Sugiarto