Patents by Inventor Husam Khashiboun

Husam Khashiboun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230394276
    Abstract: Embodiments relate to streaming convolution operations in a neural processor circuit that includes a neural engine circuit and a neural task manager. The neural task manager obtains multiple task descriptors and multiple subtask descriptors. Each task descriptor identifies a respective set of the convolution operations of a respective layer of a set of layers. Each subtask descriptor identifies a corresponding task descriptor and a subset of the convolution operations on a portion of a layer of the set of layers identified by the corresponding task descriptor. The neural processor circuit configures the neural engine circuit for execution of the subset of the convolution operations using the corresponding task descriptor. The neural engine circuit performs the subset of the convolution operations to generate output data that correspond to input data of another subset of the convolution operations identified by another subtask descriptor from the list of subtask descriptors.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 7, 2023
    Inventors: Sayyed Karen Khatamifard, Chenfan Sun, Alon Yaakov, Husam Khashiboun, Jeffrey D. Marker, Saman Naderiparizi, Ramana V. Rachakonda, Rohit K. Gupta
  • Publication number: 20230368008
    Abstract: Embodiments relate to streaming operations in a neural processor circuit that includes a neural engine circuit and a data processor circuit. The neural engine circuit performs first operations on a first input tensor of a first layer to generate a first output tensor, and second operations on a second input tensor of a second layer at a higher hierarchy than the first layer, the second input tensor corresponding to the first output tensor. The data processor circuit stores a portion of the first input tensor for access by the neural engine circuit to perform a subset of the first operations and generate a portion of the first output tensor. The data processor circuit stores the portion of the first output tensor for access by the neural engine circuit as a portion of the second input tensor to perform a subset of the second operations.
    Type: Application
    Filed: May 16, 2022
    Publication date: November 16, 2023
    Inventors: Sayyed Karen Khatamifard, Alexander J. Kirchhoff, Rohit K. Gupta, Jeffrey D. Marker, Thomas G. Anderl, Saman Naderiparizi, Chenfan Sun, Alon Yaakov, Husam Khashiboun, Ramana V. Rachakonda