Abstract: An input buffer for a memory device which receives a row address strobe RAS and produces a RAS1 from which the noise signal is removed. The device has a buffer input for externally receiving the RAS, a data output enable (DOE) locking portion for delaying the DOE signal for a predetermined time, and then producing a control signal for controlling the production of the output signal RAS1, and has a buffer output portion for receiving the RAS of the buffer input portion as an input signal and the control signal from the DOE locking portion, and producing the noise-free RAS1 in accordance with the control signal.

Abstract: An internal voltage generator circuit in a semiconductor memory device includes high voltage detecting means for receiving an external voltage, detecting whether the external voltage is at a high voltage in a burn-in mode, and generating a detection signal; and internal voltage generating means driven by a driving signal externally applied, for generating an internal voltage for a burn-in mode of a desired high voltage level higher than the external voltage or an internal voltage lower than the external voltage in response to the detection signal received from the high voltage detecting means.