Abstract: A CPU includes a program counter, a ROM, a RAM with a size smaller than the ROM, a special instruction detecting circuit and a multiplexer. A special instruction is written in an address of the RAM corresponding to the memory address, where the program codes are to be replaced, of the ROM. When the memory counter directs to the memory address containing the special instruction of the RAM, the special instruction is detected by the special instruction detecting circuit so that the content of the program counter is modified, and the multiplexer is switched to the RAM. Accordingly, in a subsequent cycle, the modified program codes stored in the RAM are directly sent to be executed. A jump instruction is added to the end of the modified program codes in the RAM, so that after the modified program codes are executed, the operation is returned to the ROM. Therefore, the CPU can modify built-in program codes thereof with a low cost.