Abstract: A signal processing circuit arranged to be used in a frequency modulated signal receiver is disclosed which includes a complex filter 105-110 connected to analog to digital converter 112, the filter having first 105-108 and second 109,110 complex filter stages and a voltage limiter 108 disposed between the stages. The circuit is of particular applicability for use in a Bluetooth receiver.

Abstract: A pseudo random pulse generator that creates a series of pulses having randomly separated intervals is described. A pseudo random pulse generator has a pseudo random number generator create a series of pseudo random binary numbers. An enable input initiates creating the series of pseudo random binary numbers and a clock input is connected to a clock signal that synchronizes creating the series of pseudo random binary numbers. A hold input prevents the generation of the pseudo random binary numbers. The pseudo random pulse generator has an interval selector to select one of a plurality of timing signals. Each timing signal is a power of two frequency division of the clock. The interval selector has select signal terminals to select one of the plurality of timing signals, and a trigger output to hold a selected timing signal. The pseudo random pulse generator further has a select buffer connected to a low order digits of the pseudo random number generator.