Patents by Inventor Hwanchul JEON

Hwanchul JEON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230301068
    Abstract: A semiconductor memory device includes a substrate, contact electrodes extending in a first direction, each of the contact electrodes including a connection portion having a first thickness and a landing portion having a second thickness, an uppermost contact electrode above the contact electrodes, the contact electrodes being longer in the first direction than the uppermost contact electrode and defining a step structure, transistor bodies extending in a second direction and having a first source/drain, a monocrystalline channel layer, and a second source/drain sequentially arranged in the second direction, the monocrystalline channel layer being connected to a corresponding contact electrode, a lower electrode layer connected to the second source/drain of each of the transistor bodies, a capacitor dielectric layer covering the lower electrode layer and having a uniform thickness, and an upper electrode layer separated from the lower electrode layer by the capacitor dielectric layer.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 21, 2023
    Inventors: Hwanchul JEON, Yeonsu KIM, Youngsik LEE, Hyuk KIM, Sangwuk PARK
  • Patent number: 10274820
    Abstract: A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: April 30, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwanchul Jeon, Munja Kim, Sungwon Kwon, Byunggook Kim, Roman Chalykh, Yongseok Jung, Jaehyuck Choi
  • Publication number: 20180203346
    Abstract: A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.
    Type: Application
    Filed: March 13, 2018
    Publication date: July 19, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hwanchul JEON, Munja KIM, Sungwon KWON, Byunggook KIM, Roman CHALYKH, Yongseok JUNG, Jaehyuck CHOI
  • Patent number: 9952502
    Abstract: A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwanchul Jeon, Munja Kim, Sungwon Kwon, Byunggook Kim, Roman Chalykh, Yongseok Jung, Jaehyuck Choi
  • Patent number: 9753367
    Abstract: The method includes forming a graphite layer on a substrate, forming a supporting layer on the graphite layer to form a stack of the graphite layer and the supporting layer, removing the substrate to separate the stack from the substrate, transferring the stack of the graphite layer and the supporting layer onto a frame, and removing the supporting layer from the frame.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: September 5, 2017
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Munja Kim, Ji-Beom Yoo, Sooyoung Kim, Taesung Kim, Dong-Wook Shin, Hwanchul Jeon, Seul-Gi Kim
  • Publication number: 20160334698
    Abstract: A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.
    Type: Application
    Filed: January 12, 2016
    Publication date: November 17, 2016
    Inventors: Hwanchul JEON, Munja KIM, Sungwon KWON, Byunggook KIM, Roman CHALYKH, Yongseok JUNG, Jaehyuck CHOI
  • Publication number: 20160195804
    Abstract: The method includes forming a graphite layer on a substrate, forming a supporting layer on the graphite layer to form a stack of the graphite layer and the supporting layer, removing the substrate to separate the stack from the substrate, transferring the stack of the graphite layer and the supporting layer onto a frame, and removing the supporting layer from the frame.
    Type: Application
    Filed: December 17, 2015
    Publication date: July 7, 2016
    Applicant: Research & Business Foundation SUNGKYUNKWAN UNIVERSITY
    Inventors: Munja KIM, Ji-Beom YOO, Sooyoung KIM, Taesung KIM, Dong-Wook SHIN, Hwanchul JEON, Seul-Gi KIM