Patents by Inventor Hwei-Lin Chuang

Hwei-Lin Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for forming silicon-containing film and method for decreasing number of particles
    Patent number: 7329591
    Abstract: A method for forming a silicon-containing film is described. A substrate is placed in a reaction chamber, and then a silicon-containing gas is introduced into the reaction chamber to conduct a CVD process and deposit a silicon-containing film on the substrate. During the CVD process, the temperature of at least the top inner surface of the reaction chamber is controlled below 50° C.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: February 12, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Che-Hung Liu, Po-Lun Cheng, Hwei-Lin Chuang, Chun-An Lin
  • Method for forming silicon-containing film and method for decreasing number of particles
    Publication number: 20070197007
    Abstract: A method for forming a silicon-containing film is described. A substrate is placed in a reaction chamber, and then a silicon-containing gas is introduced into the reaction chamber to conduct a CVD process and deposit a silicon-containing film on the substrate. During the CVD process, the temperature of at least the top inner surface of the reaction chamber is controlled below 50° C.
    Type: Application
    Filed: February 21, 2006
    Publication date: August 23, 2007
    Inventors: Che-Hung Liu, Po-Lun Cheng, Hwei-Lin Chuang, Chun-An Lin
  • Method of manufacturing deep trench capacitor
    Patent number: 6680237
    Abstract: A method of manufacturing a deep trench capacitor. A deep trench is formed in a substrate. A conformal capacitor dielectric layer and a first conductive layer are sequentially formed, completely filling the deep trench. The first conductive layer has a seam. The first conductive layer is etched to open up the seam. A collar oxide layer is formed over the interior surface of the deep trench. A collar liner layer is formed over the collar oxide layer inside the deep trench. Using the collar liner layer as a mask, the collar oxide material above the first conductive layer and within the seam is removed. The collar liner layer is removed. Finally, a second conductive layer and a third conductive layer are sequentially formed inside the deep trench.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: January 20, 2004
    Assignee: ProMos Technologies Inc.
    Inventors: Shih-Lung Chen, Hsiao-Lei Wang, Hwei-Lin Chuang, Yueh-Chuan Lee
  • Method of manufacturing deep trench capacitor
    Publication number: 20030017675
    Abstract: A method of manufacturing a deep trench capacitor. A deep trench is formed in a substrate. A conformal capacitor dielectric layer and a first conductive layer are sequentially formed, completely filling the deep trench. The first conductive layer has a seam. The first conductive layer is etched to open up the seam. A collar oxide layer is formed over the interior surface of the deep trench. A collar liner layer is formed over the collar oxide layer inside the deep trench. Using the collar liner layer as a mask, the collar oxide material above the first conductive layer and within the seam is removed. The collar liner layer is removed. Finally, a second conductive layer and a third conductive layer are sequentially formed inside the deep trench.
    Type: Application
    Filed: September 27, 2001
    Publication date: January 23, 2003
    Inventors: Shih-Lung Chen, Hsiao-Lei Wang, Hwei-Lin Chuang, Yueh-Chuan Lee