Patents by Inventor Hwi-jong YOO
Hwi-jong YOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230284378Abstract: A storage device includes a printed circuit board including a controller site, a first memory site, a second memory site, first conductive lines connected with the controller site, second conductive lines connected with the first memory site, and third conductive lines connected with the second memory site, a controller package provided on the controller site, a first nonvolatile memory package provided on the first memory site, a second nonvolatile memory package provided on the second memory site, and at least one resistor connecting at least one conductive line of the first conductive lines with at least one conductive line of the second conductive lines.Type: ApplicationFiled: January 30, 2023Publication date: September 7, 2023Applicant: SAMSUNG ELECTRONICS CO., LTDInventors: Sun-Ki YUN, Hwi-Jong Yoo, Jeonggi Yoon
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Patent number: 11277916Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.Type: GrantFiled: October 1, 2020Date of Patent: March 15, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-guk Seo, Sun-ki Yun, Su-jin Kim, Hwi-jong Yoo, Young-rok Oh
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Publication number: 20210022249Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.Type: ApplicationFiled: October 1, 2020Publication date: January 21, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Byung-guk SEO, Sun-ki YUN, Su-jin KIM, Hwi-jong YOO, Young-rok OH
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Patent number: 10840221Abstract: A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.Type: GrantFiled: February 6, 2020Date of Patent: November 17, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Ilsoo Kim, Heeyoub Kang, Young-Rok Oh, Kitaek Lee, Hwi-Jong Yoo
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Patent number: 10820419Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.Type: GrantFiled: December 3, 2018Date of Patent: October 27, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-guk Seo, Sun-ki Yun, Su-jin Kim, Hwi-jong Yoo, Young-rok Oh
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Publication number: 20200176423Abstract: A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.Type: ApplicationFiled: February 6, 2020Publication date: June 4, 2020Inventors: ILSOO KIM, HEEYOUB KANG, YOUNG-ROK OH, KITAEK LEE, HWI-JONG YOO
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Patent number: 10593648Abstract: A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.Type: GrantFiled: July 2, 2018Date of Patent: March 17, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Ilsoo Kim, Heeyoub Kang, Young-Rok Oh, Kitaek Lee, Hwi-Jong Yoo
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Patent number: 10529692Abstract: A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.Type: GrantFiled: November 14, 2017Date of Patent: January 7, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Ilsoo Kim, Heeyoub Kang, Young-Rok Oh, Kitaek Lee, Hwi-Jong Yoo
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Publication number: 20190373730Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.Type: ApplicationFiled: December 3, 2018Publication date: December 5, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Byung-guk SEO, Sun-ki YUN, Su-jin KIM, Hwi-jong YOO, Young-rok OH
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Patent number: 10212808Abstract: Disclosed is a printed circuit hoard. The printed circuit board includes a plurality of insulation layers and a plurality of pattern layers alternately stacked. The printed circuit board includes a plurality of device areas on which semiconductor packages are mounted and a peripheral area adjacent the device areas. An electrostatic discharge pattern is in a respective pattern layer among the plurality of pattern layers and is disposed at a boundary region between a respective device area of the plurality of device areas and the peripheral area.Type: GrantFiled: April 7, 2016Date of Patent: February 19, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Iksung Park, Heeyoub Kang, Young-Min Kim, Eunji You, Hwi-jong Yoo
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Publication number: 20180323175Abstract: A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.Type: ApplicationFiled: July 2, 2018Publication date: November 8, 2018Inventors: ILSOO KIM, HEEYOUB KANG, YOUNG-ROK OH, KITAEK LEE, HWI-JONG YOO
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Patent number: 10068828Abstract: A semiconductor storage device includes a circuit substrate. The circuit substrate includes a main body and a connection tab connected to a side of the main body. The a main body includes a first chip mounting region and a second chip mounting region. A first semiconductor chip of a first type is mounted on the first chip mounting region. A second semiconductor chip of a second type is mounted on the second chip mounting region. The first type of the first semiconductor chip is different from the second type of the second semiconductor chip. The circuit substrate further includes a first thermal via in the connection tab and comprising a conductive material.Type: GrantFiled: April 4, 2017Date of Patent: September 4, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Min-Young Choi, Young-Rok Oh, Hwi-Jong Yoo, Il-Soo Kim, Joo-Young Kim, Ki-Taek Lee, Eun-Ji Yu
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Publication number: 20180158752Abstract: A semiconductor storage device includes a circuit substrate. The circuit substrate includes a main body and a connection tab connected to a side of the main body. The a main body includes a first chip mounting region and a second chip mounting region. A first semiconductor chip of a first type is mounted on the first chip mounting region. A second semiconductor chip of a second type is mounted on the second chip mounting region. The first type of the first semiconductor chip is different from the second type of the second semiconductor chip. The circuit substrate further includes a first thermal via in the connection tab and comprising a conductive material.Type: ApplicationFiled: April 4, 2017Publication date: June 7, 2018Inventors: MIN-YOUNG CHOI, YOUNG-ROK OH, HWI-JONG YOO, IL-SOO KIM, JOO-YOUNG KIM, KI-TAEK LEE, EUN-JI YU
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Publication number: 20180138154Abstract: A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.Type: ApplicationFiled: November 14, 2017Publication date: May 17, 2018Inventors: ILSOO KIM, HEEYOUB KANG, YOUNG-ROK OH, KITAEK LEE, HWI-JONG YOO
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Patent number: 9888565Abstract: A memory module includes a module board extending in one direction, a plurality of electronic elements mounted on the module board, and at least one stress detection pattern in a position between the electronic elements or adjacent to one or more of the electronic elements on the module board and including a plurality of strips configured to indicate a stress level generated in the position by an external force applied to the module board.Type: GrantFiled: June 8, 2016Date of Patent: February 6, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Kwang-Kyu Bang, Yusuf Cinar, Hwi-Jong Yoo
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Publication number: 20170094781Abstract: A memory module includes a module board extending in one direction, a plurality of electronic elements mounted on the module board, and at least one stress detection pattern in a position between the electronic elements or adjacent to one or more of the electronic elements on the module board and including a plurality of strips configured to indicate a stress level generated in the position by an external force applied to the module board.Type: ApplicationFiled: June 8, 2016Publication date: March 30, 2017Inventors: Kwang-Kyu Bang, Yusuf Cinar, Hwi-Jong Yoo
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Publication number: 20170048970Abstract: Disclosed is a printed circuit hoard. The printed circuit board includes a plurality of insulation layers and a plurality of pattern layers alternately stacked, The printed circuit board includes a plurality of device areas on which semiconductor packages are mounted and a peripheral area adjacent the device areas. An electrostatic discharge pattern is in a respective pattern layer among the plurality of pattern layers and is disposed at a boundary region between a respective device area of the plurality of device areas and the peripheral area.Type: ApplicationFiled: April 7, 2016Publication date: February 16, 2017Inventors: Iksung Park, Heeyoub KANG, Young-Min KIM, Eunji YOU, Hwi-jong YOO