Patents by Inventor Hy Dinh Vu

Hy Dinh Vu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11662922
    Abstract: In some examples, a system allocates a plurality of partitions of a shared storage to respective data services. Based on respective utilizations of the plurality of partitions, the system selects, for a given data service of the data services, between a global storage apportionment process to rebalance shares of the shared storage among the data services, and a local storage apportionment process, where the rebalancing includes releasing a partition of the given data service, and the local storage apportionment process comprising freeing segments within the partition of the given data service.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: May 30, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Hy Dinh Vu, Murali Krishna Vishnumolakala, Yihong Xu, Ying Hu
  • Publication number: 20230121626
    Abstract: In some examples, a system allocates a plurality of partitions of a shared storage to respective data services. Based on respective utilizations of the plurality of partitions, the system selects, for a given data service of the data services, between a global storage apportionment process to rebalance shares of the shared storage among the data services, and a local storage apportionment process, where the rebalancing includes releasing a partition of the given data service, and the local storage apportionment process comprising freeing segments within the partition of the given data service.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Hy Dinh Vu, Murali Krishna Vishnumolakala, Yihong Xu, Ying Hu
  • Patent number: 9552300
    Abstract: A cache system for a storage device includes a solid state drive (SSD), a random access memory (RAM), and a cache control device. The cache control device is configured to: retrieve data from the storage device in response to a request to read data from the storage device, store at least some of the data in one or both of (i) the SSD and (ii) the RAM, when storing the at least some of the data to the RAM, write to the RAM non-sequentially with respect to a memory space of the RAM, and when storing the at least some of the data in the SSD, write to the SSD sequentially with respect to a memory space of the SSD. The cache control device comprises an SSD interface device configured to allocate memory for storing data in the SSD sequentially with respect to the memory space of the SSD.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: January 24, 2017
    Assignee: Marvell World Trade Ltd.
    Inventors: Shailesh Shiwalkar, Hy Dinh Vu, Jagadish K. Mukku, Sandeep Karmarkar, Anil Goyal
  • Publication number: 20150269082
    Abstract: A cache system for a storage device includes a solid state drive (SSD), a random access memory (RAM), and a cache control device. The cache control device is configured to: retrieve data from the storage device in response to a request to read data from the storage device, store at least some of the data in one or both of (i) the SSD and (ii) the RAM, when storing the at least some of the data to the RAM, write to the RAM non-sequentially with respect to a memory space of the RAM, and when storing the at least some of the data in the SSD, write to the SSD sequentially with respect to a memory space of the SSD. The cache control device comprises an SSD interface device configured to allocate memory for storing data in the SSD sequentially with respect to the memory space of the SSD.
    Type: Application
    Filed: June 8, 2015
    Publication date: September 24, 2015
    Inventors: Shailesh SHIWALKAR, Hy Dinh VU, Jagadish K. MUKKU, Sandeep KARMARKAR, Anil GOYAL
  • Patent number: 9053010
    Abstract: A cache system for a storage device includes (i) one or more solid state drives (SSDs), (ii) one or more random access memories (RAMs), and (iii) a cache control device. The cache control device caches at least some of first data that is to be written to the storage device, and caches at least some of second data that is retrieved from the storage device. When caching first data or second data in one of the one or more RAMs, the cache control device writes to the one RAM non-sequentially with respect to a memory space of the one RAM. When caching first data or second data in one of the one or more SSDs, the cache control device writes to the one SSD sequentially with respect to a memory space of the one SSD.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: June 9, 2015
    Assignee: MARVELL WORLD TRADE LTD.
    Inventors: Shailesh Shiwalkar, Hy Dinh Vu, Jagadish K. Mukku, Sandeep Karmarkar, Anil Goyal