Abstract: The present invention relates to exosomes isolated from dermal papilla progenitor cells, specifically, the exosomes isolated from the dermal papilla progenitor cells which are excellent in prevention, improvement and treatment of hair loss (alopecia) and are also excellent in terms of skin improvement and wound healing effects, as well as various uses thereof.

Abstract: Provided herein is a method of preventing hair loss or promoting hair growth, the method including administering an effective amount of a PDE 3 inhibitor. More particularly, when the method of the present disclosure is used, an excellent hair loss prevention or hair growth promotion effect is obtained by inhibiting the activity of PDE 3.

Abstract: Provided herein is a method of preventing hair loss or promoting hair growth, the method including administering an effective amount of a PDE 3 inhibitor. More particularly, when the method of the present disclosure is used, an excellent hair loss prevention or hair growth promotion effect is obtained by inhibiting the activity of PDE 3.

Abstract: The present invention relates to an anti-inflammatory composition using the antibody specifically binding to CD93 or its soluble fragment, and a diagnostic method and a diagnostic kit for inflammatory disease using CD93 or its soluble fragment specific antibody or aptamer.

Abstract: The present invention relates to an anti-inflammatory composition using the antibody specifically binding to CD93 or its soluble fragment, and a diagnostic method and a diagnostic kit for inflammatory disease using CD93 or its soluble fragment specific antibody or aptamer.

Abstract: A semiconductor memory device includes a mode setting register for generating a parallel bit test signal and a code according to an externally applied mode setting register code in response to a mode setting command; a data input circuit for receiving and outputting at least one bit of externally applied data in response to a write command; and a test pattern data generating circuit for receiving the parallel bit test signal and a predetermined bit from the code to generate a test pattern data in response to the at least one bit of externally applied data received from the data input circuit.

Abstract: A delay-locked loop (DLL) circuit capable of decreasing power consumption is provided. A DLL circuit includes a delay line, an output buffer, a replica circuit, a phase detector, a shift register and a replica control circuit. The delay line delays an external clock signal for a determined time to generate a first signal. The output buffer buffers the first signal to generate an internal clock signal. The replica circuit delays the first signal for a determined time to generate a feedback signal. The phase detector compares the feedback signal with the external clock signal to generate a shift control signal. The shift register performs a shifting operation based on the shift control signal to generate the plurality of delay control bits. The replica control circuit generates a replica control signal based on the external clock signal and a lock signal, to control the replica circuit.

Abstract: A semiconductor memory device includes a mode setting register for generating a parallel bit test signal and a code according to an externally applied mode setting register code in response to a mode setting command; a data input circuit for receiving and outputting at least one bit of externally applied data in response to a write command; and a test pattern data generating circuit for receiving the parallel bit test signal and a predetermined bit from the code to generate a test pattern data in response to the at least one bit of externally applied data received from the data input circuit.