Patents by Inventor Hye-ji Lee

Hye-ji Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11969693
    Abstract: Provided is an ultra large-width coating device applied to a consecutive process. More particularly, the present invention relates to a coating device capable of maximizing productivity by consecutively manufacturing a large-width film without reducing physical properties of the manufactured film by overcoming a problem in that a coating width is limited during a coating process using the existing contact type coating roller, and a method for manufacturing an ultra large-width membrane using the same.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: April 30, 2024
    Assignees: SK INNOVATION CO., LTD., SK IE TECHNOLOGY CO., LTD.
    Inventors: Dong Jin Joo, Kyu Young Cho, Yun Bong Kim, Su Ji Lee, Won Sub Kwack, Hye Jin Kim
  • Publication number: 20240120580
    Abstract: A sealing device for a pouch-type battery includes an upper sealing block and a lower sealing block. The upper sealing block has a two-stage upper sealing groove, including a first upper step and a second upper step, and the lower sealing block has a two-stage lower sealing groove, including a first lower step and a second lower step. The upper sealing block contacts a first surface of an electrode lead sealing part of the pouch-type battery, and the lower sealing block contacts a second surface of the electrode lead sealing part of the pouch-type battery in a process of performing sealing through heat fusion. A pouch-type battery having an electrode lead sealing part formed by the sealing device is also provided.
    Type: Application
    Filed: November 17, 2022
    Publication date: April 11, 2024
    Applicant: LG Energy Solution, Ltd.
    Inventors: Seung Ho Na, Kwang Hee Choi, Dong Kyun Ha, Yoon Beom Lee, Do Woo Kim, Hye Ji Lee
  • Publication number: 20240101738
    Abstract: An ethylene/alpha-olefin copolymer having excellent physical properties showing reduced immersion time of a crosslinking agent and a high degree of crosslinking, and a composition for an encapsulant film, comprising the same, is described herein.
    Type: Application
    Filed: October 28, 2022
    Publication date: March 28, 2024
    Applicant: LG Chem, Ltd.
    Inventors: Jin Sam Gong, Eun Jung Lee, Jeong Yon Jeong, Young Woo Lee, Jung Kyu Lee, Si Jung Lee, Hye Ji Lee
  • Patent number: 11881268
    Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: January 23, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye Ji Lee, Jin-Kyu Kang, Rae Young Lee, Se Jun Park, Jae Duk Lee, Gu Yeon Han
  • Publication number: 20230089406
    Abstract: The present invention relates to an ethylene/alpha-olefin copolymer having excellent volume resistance and light transmittance, and a method for preparing the same.
    Type: Application
    Filed: April 16, 2021
    Publication date: March 23, 2023
    Applicant: LG Chem, Ltd.
    Inventors: Jin Sam Gong, Eun Jung Lee, Young Woo Lee, Jung Ho Jun, Jin Kuk Lee, Sang Hyun Hong, Jong Gil Kim, Hye Ji Lee, Sang Wook Han
  • Publication number: 20230022639
    Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.
    Type: Application
    Filed: April 4, 2022
    Publication date: January 26, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hye Ji LEE, Jin-Kyu KANG, Rae Young LEE, Se Jun PARK, Jae Duk LEE, Gu Yeon HAN
  • Publication number: 20220340698
    Abstract: The present invention relates to a composition for an encapsulant film, including an ethylene/alpha-olefin copolymer having excellent volume resistance and light transmittance, and an encapsulant film using the same.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 27, 2022
    Applicant: LG Chem, Ltd.
    Inventors: Jin Sam Gong, Eun Jung Lee, Young Woo Lee, Jung Ho Jun, Jin Kuk Lee, Sang Hyun Hong, Jong Gil Kim, Hye Ji Lee, Sang Wook Han
  • Publication number: 20220135928
    Abstract: Disclosed are a method and a device for determining an operating condition of a bioreactor. Each of the method and the device receives N experimental data sets, models the bioreactor using the N experimental data sets to construct a bioreactor model, and determines an optimal operation condition based on an operation scheme of the bioreactor, using the constructed bioreactor model.
    Type: Application
    Filed: January 14, 2020
    Publication date: May 5, 2022
    Applicants: CJ CHEILJEDANG CORPORATION, SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Dae Shik KIM, Seong Eun BANG, Jong Hwan SHIN, Il Chul KIM, Seon Mi PARK, Jong Min LEE, Jae Han BAE, Hye Ji LEE, Jung Hun KIM
  • Patent number: 11233000
    Abstract: A semiconductor package includes a first metal interconnection disposed in a semiconductor chip, a first bump group configured to be connected to the first metal interconnection, a first inner lead pattern group configured to be connected to the first bump group, a second metal interconnection disposed in the semiconductor chip, a second bump group configured to be connected to the second metal interconnection; and a second inner lead pattern group configured to be connected to the second bump group, wherein a density of the first metal interconnection is greater than a density of the second metal interconnection, such that a first pitch of the first lead pattern group is greater than a second pitch of the second lead pattern group.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: January 25, 2022
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Jae Sik Choi, Do Young Kim, Jin Won Jeong, Hye Ji Lee
  • Patent number: 10891073
    Abstract: Provided are storage apparatuses for a virtualized system and methods for operating the same. A method for operating a storage apparatus having a write buffer and a memory includes receiving a write request from a virtual machine, identifying a write pattern corresponding to the received write request by comparing a write data size indicated by the write request with a predetermined threshold, and allocating the received write request differently based on the identified write pattern.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: January 12, 2021
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Young Ik Eom, Hye Ji Lee, Min Ho Lee
  • Publication number: 20200286817
    Abstract: A semiconductor package includes a first metal interconnection disposed in a semiconductor chip, a first bump group configured to be connected to the first metal interconnection, a first inner lead pattern group configured to be connected to the first bump group, a second metal interconnection disposed in the semiconductor chip, a second bump group configured to be connected to the second metal interconnection; and a second inner lead pattern group configured to be connected to the second bump group, wherein a density of the first metal interconnection is greater than a density of the second metal interconnection, such that a first pitch of the first lead pattern group is greater than a second pitch of the second lead pattern group.
    Type: Application
    Filed: July 5, 2019
    Publication date: September 10, 2020
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Jae Sik CHOI, Do Young KIM, Jin Won JEONG, Hye Ji LEE
  • Patent number: 10741521
    Abstract: A semiconductor package manufacturing method includes preparing a flexible film including input wire patterns and output wire patterns, preparing a semiconductor chip including metal bumps, attaching the semiconductor chip to one side of the flexible film, such that the metal bumps are connected to either one or both of the input wire patterns and the output wire patterns, and attaching a first absorbing and shielding tape to another side of the flexible film, wherein the first absorbing and shielding tape includes an absorption film and a protective insulating film disposed on the absorption film.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: August 11, 2020
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Jae Sik Choi, Jin Won Jeong, Do Young Kim, Hye Ji Lee, Byeung Soo Song
  • Publication number: 20200035644
    Abstract: A semiconductor package manufacturing method includes preparing a flexible film including input wire patterns and output wire patterns, preparing a semiconductor chip including metal bumps, attaching the semiconductor chip to one side of the flexible film, such that the metal bumps are connected to either one or both of the input wire patterns and the output wire patterns, and attaching a first absorbing and shielding tape to another side of the flexible film, wherein the first absorbing and shielding tape includes an absorption film and a protective insulating film disposed on the absorption film.
    Type: Application
    Filed: April 23, 2019
    Publication date: January 30, 2020
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Jae Sik CHOI, Jin Won JEONG, Do Young KIM, Hye Ji LEE, Byeung Soo SONG
  • Publication number: 20190310794
    Abstract: Provided are storage apparatuses for a virtualized system and methods for operating the same. A method for operating a storage apparatus having a write buffer and a memory includes receiving a write request from a virtual machine, identifying a write pattern corresponding to the received write request by comparing a write data size indicated by the write request with a predetermined threshold, and allocating the received write request differently based on the identified write pattern.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 10, 2019
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Young Ik EOM, Hye Ji LEE, Min Ho LEE
  • Patent number: D846403
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: April 23, 2019
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Hye Ji Lee, Yul Joong Kim, Hyun Jik Lee
  • Patent number: D846405
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: April 23, 2019
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Hye Ji Lee, Yul Joong Kim, Hyun Jik Lee
  • Patent number: D997736
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: September 5, 2023
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim
  • Patent number: D1000284
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: October 3, 2023
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim
  • Patent number: D1006635
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: December 5, 2023
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim
  • Patent number: D1008040
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: December 19, 2023
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim