Patents by Inventor Hye-ji Lee
Hye-ji Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250197573Abstract: The encapsulant film composition includes an ethylene/alpha-olefin copolymer and porous silica and has excellent compatibility with a crosslinking additive. The encapsulant film composition has a ratio of an Si—O band integral value to a C—H band integral value of from 3 to 70. When an encapsulant film is produced using the encapsulant film composition, the impregnation time of an ethylene/alpha-olefin copolymer is reduced so that the economic viability of a process of producing an encapsulant film can be improved. Moreover, by delaying the transfer of the crosslinking agent, it is possible to suppress a slip phenomenon of the encapsulant film. The present disclosure also relates to a solar cell module.Type: ApplicationFiled: June 7, 2023Publication date: June 19, 2025Applicant: LG Chem, Ltd.Inventors: Young Woo Lee, Jin Sam Gong, Jung Ho Jun, Eun Jung Lee, Sang Hyun Hong, Hye Ji Lee, Sang Wook Han
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Patent number: 12154632Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.Type: GrantFiled: December 19, 2023Date of Patent: November 26, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Hye Ji Lee, Jin-Kyu Kang, Rae Young Lee, Se Jun Park, Jae Duk Lee, Gu Yeon Han
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Publication number: 20240153563Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.Type: ApplicationFiled: December 19, 2023Publication date: May 9, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Hye Ji LEE, Jin-Kyu KANG, Rae Young LEE, Se Jun PARK, Jae Duk LEE, Gu Yeon HAN
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Publication number: 20240120580Abstract: A sealing device for a pouch-type battery includes an upper sealing block and a lower sealing block. The upper sealing block has a two-stage upper sealing groove, including a first upper step and a second upper step, and the lower sealing block has a two-stage lower sealing groove, including a first lower step and a second lower step. The upper sealing block contacts a first surface of an electrode lead sealing part of the pouch-type battery, and the lower sealing block contacts a second surface of the electrode lead sealing part of the pouch-type battery in a process of performing sealing through heat fusion. A pouch-type battery having an electrode lead sealing part formed by the sealing device is also provided.Type: ApplicationFiled: November 17, 2022Publication date: April 11, 2024Applicant: LG Energy Solution, Ltd.Inventors: Seung Ho Na, Kwang Hee Choi, Dong Kyun Ha, Yoon Beom Lee, Do Woo Kim, Hye Ji Lee
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Publication number: 20240101738Abstract: An ethylene/alpha-olefin copolymer having excellent physical properties showing reduced immersion time of a crosslinking agent and a high degree of crosslinking, and a composition for an encapsulant film, comprising the same, is described herein.Type: ApplicationFiled: October 28, 2022Publication date: March 28, 2024Applicant: LG Chem, Ltd.Inventors: Jin Sam Gong, Eun Jung Lee, Jeong Yon Jeong, Young Woo Lee, Jung Kyu Lee, Si Jung Lee, Hye Ji Lee
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Patent number: 11881268Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.Type: GrantFiled: April 4, 2022Date of Patent: January 23, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Hye Ji Lee, Jin-Kyu Kang, Rae Young Lee, Se Jun Park, Jae Duk Lee, Gu Yeon Han
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Publication number: 20230089406Abstract: The present invention relates to an ethylene/alpha-olefin copolymer having excellent volume resistance and light transmittance, and a method for preparing the same.Type: ApplicationFiled: April 16, 2021Publication date: March 23, 2023Applicant: LG Chem, Ltd.Inventors: Jin Sam Gong, Eun Jung Lee, Young Woo Lee, Jung Ho Jun, Jin Kuk Lee, Sang Hyun Hong, Jong Gil Kim, Hye Ji Lee, Sang Wook Han
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Publication number: 20230022639Abstract: A semiconductor memory device includes a source layer, a channel structure, gate electrodes on the source layer and spaced apart on a sidewall of the channel structure, and a common source line. The gate electrodes include a first word line group including first and second gate electrodes and a second word line group including third and fourth gate electrodes. The semiconductor memory device, in response to a voltage of the common source line reaching a target voltage, causes an inhibition voltage to be applied to the second word line group and an erase voltage to be applied to the first word line group in a first erase operation interval, and causes the inhibition voltage to be applied to the first word line group and the erase voltage to be applied to the second word line group in a second erase operation interval.Type: ApplicationFiled: April 4, 2022Publication date: January 26, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Hye Ji LEE, Jin-Kyu KANG, Rae Young LEE, Se Jun PARK, Jae Duk LEE, Gu Yeon HAN
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Publication number: 20220340698Abstract: The present invention relates to a composition for an encapsulant film, including an ethylene/alpha-olefin copolymer having excellent volume resistance and light transmittance, and an encapsulant film using the same.Type: ApplicationFiled: April 16, 2021Publication date: October 27, 2022Applicant: LG Chem, Ltd.Inventors: Jin Sam Gong, Eun Jung Lee, Young Woo Lee, Jung Ho Jun, Jin Kuk Lee, Sang Hyun Hong, Jong Gil Kim, Hye Ji Lee, Sang Wook Han
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Publication number: 20220135928Abstract: Disclosed are a method and a device for determining an operating condition of a bioreactor. Each of the method and the device receives N experimental data sets, models the bioreactor using the N experimental data sets to construct a bioreactor model, and determines an optimal operation condition based on an operation scheme of the bioreactor, using the constructed bioreactor model.Type: ApplicationFiled: January 14, 2020Publication date: May 5, 2022Applicants: CJ CHEILJEDANG CORPORATION, SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Dae Shik KIM, Seong Eun BANG, Jong Hwan SHIN, Il Chul KIM, Seon Mi PARK, Jong Min LEE, Jae Han BAE, Hye Ji LEE, Jung Hun KIM
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Patent number: 11233000Abstract: A semiconductor package includes a first metal interconnection disposed in a semiconductor chip, a first bump group configured to be connected to the first metal interconnection, a first inner lead pattern group configured to be connected to the first bump group, a second metal interconnection disposed in the semiconductor chip, a second bump group configured to be connected to the second metal interconnection; and a second inner lead pattern group configured to be connected to the second bump group, wherein a density of the first metal interconnection is greater than a density of the second metal interconnection, such that a first pitch of the first lead pattern group is greater than a second pitch of the second lead pattern group.Type: GrantFiled: July 5, 2019Date of Patent: January 25, 2022Assignee: MagnaChip Semiconductor, Ltd.Inventors: Jae Sik Choi, Do Young Kim, Jin Won Jeong, Hye Ji Lee
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Patent number: 10891073Abstract: Provided are storage apparatuses for a virtualized system and methods for operating the same. A method for operating a storage apparatus having a write buffer and a memory includes receiving a write request from a virtual machine, identifying a write pattern corresponding to the received write request by comparing a write data size indicated by the write request with a predetermined threshold, and allocating the received write request differently based on the identified write pattern.Type: GrantFiled: March 26, 2019Date of Patent: January 12, 2021Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Young Ik Eom, Hye Ji Lee, Min Ho Lee
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Publication number: 20200286817Abstract: A semiconductor package includes a first metal interconnection disposed in a semiconductor chip, a first bump group configured to be connected to the first metal interconnection, a first inner lead pattern group configured to be connected to the first bump group, a second metal interconnection disposed in the semiconductor chip, a second bump group configured to be connected to the second metal interconnection; and a second inner lead pattern group configured to be connected to the second bump group, wherein a density of the first metal interconnection is greater than a density of the second metal interconnection, such that a first pitch of the first lead pattern group is greater than a second pitch of the second lead pattern group.Type: ApplicationFiled: July 5, 2019Publication date: September 10, 2020Applicant: MagnaChip Semiconductor, Ltd.Inventors: Jae Sik CHOI, Do Young KIM, Jin Won JEONG, Hye Ji LEE
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Patent number: 10741521Abstract: A semiconductor package manufacturing method includes preparing a flexible film including input wire patterns and output wire patterns, preparing a semiconductor chip including metal bumps, attaching the semiconductor chip to one side of the flexible film, such that the metal bumps are connected to either one or both of the input wire patterns and the output wire patterns, and attaching a first absorbing and shielding tape to another side of the flexible film, wherein the first absorbing and shielding tape includes an absorption film and a protective insulating film disposed on the absorption film.Type: GrantFiled: April 23, 2019Date of Patent: August 11, 2020Assignee: MagnaChip Semiconductor, Ltd.Inventors: Jae Sik Choi, Jin Won Jeong, Do Young Kim, Hye Ji Lee, Byeung Soo Song
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Publication number: 20200035644Abstract: A semiconductor package manufacturing method includes preparing a flexible film including input wire patterns and output wire patterns, preparing a semiconductor chip including metal bumps, attaching the semiconductor chip to one side of the flexible film, such that the metal bumps are connected to either one or both of the input wire patterns and the output wire patterns, and attaching a first absorbing and shielding tape to another side of the flexible film, wherein the first absorbing and shielding tape includes an absorption film and a protective insulating film disposed on the absorption film.Type: ApplicationFiled: April 23, 2019Publication date: January 30, 2020Applicant: Magnachip Semiconductor, Ltd.Inventors: Jae Sik CHOI, Jin Won JEONG, Do Young KIM, Hye Ji LEE, Byeung Soo SONG
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Publication number: 20190310794Abstract: Provided are storage apparatuses for a virtualized system and methods for operating the same. A method for operating a storage apparatus having a write buffer and a memory includes receiving a write request from a virtual machine, identifying a write pattern corresponding to the received write request by comparing a write data size indicated by the write request with a predetermined threshold, and allocating the received write request differently based on the identified write pattern.Type: ApplicationFiled: March 26, 2019Publication date: October 10, 2019Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Young Ik EOM, Hye Ji LEE, Min Ho LEE
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Patent number: D997736Type: GrantFiled: February 25, 2022Date of Patent: September 5, 2023Assignee: CJ CHEILJEDANG CORPORATIONInventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim
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Patent number: D1000284Type: GrantFiled: February 28, 2022Date of Patent: October 3, 2023Assignee: CJ CHEILJEDANG CORPORATIONInventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim
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Patent number: D1006635Type: GrantFiled: February 28, 2022Date of Patent: December 5, 2023Assignee: CJ CHEILJEDANG CORPORATIONInventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim
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Patent number: D1008040Type: GrantFiled: February 25, 2022Date of Patent: December 19, 2023Assignee: CJ CHEILJEDANG CORPORATIONInventors: Hye Ji Lee, Sae Rom Jung, Yun Jung Baek, Kang Kook Lee, Moon Joo Kim