Patents by Inventor Hye Kyoung JUE

Hye Kyoung JUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10553438
    Abstract: A method for fabricating a semiconductor device includes stacking a semiconductor layer, a first sacrificial layer, and a second sacrificial layer, patterning the second sacrificial layer to form a second sacrificial pattern, forming a spacer pattern on both sides of the second sacrificial pattern, wherein a pitch of the spacer pattern is constant, and a width of the spacer pattern is constant, removing the second sacrificial pattern, forming a mask layer that covers the spacer pattern, forming a supporting pattern on the mask layer, wherein a width of the supporting pattern is greater than a width of the spacer pattern, and the supporting pattern is overlapped with the spacer pattern, transferring the supporting pattern and the spacer pattern onto the first sacrificial layer to form gate and supporting patterns, and transferring the gate and supporting patterns onto the semiconductor layer to form a gate and a supporting gate.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yun Kyeong Jang, Sang Jin Kim, Dong Woon Park, Joon Soo Park, Chang Jae Yang, Kwang Sub Yoon, Hye Kyoung Jue
  • Publication number: 20170372906
    Abstract: A method for fabricating a semiconductor device includes stacking a semiconductor layer, a first sacrificial layer, and a second sacrificial layer, patterning the second sacrificial layer to form a second sacrificial pattern, forming a spacer pattern on both sides of the second sacrificial pattern, wherein a pitch of the spacer pattern is constant, and a width of the spacer pattern is constant, removing the second sacrificial pattern, forming a mask layer that covers the spacer pattern, forming a supporting pattern on the mask layer, wherein a width of the supporting pattern is greater than a width of the spacer pattern, and the supporting pattern is overlapped with the spacer pattern, transferring the supporting pattern and the spacer pattern onto the first sacrificial layer to form gate and supporting patterns, and transferring the gate and supporting patterns onto the semiconductor layer to form a gate and a supporting gate.
    Type: Application
    Filed: January 19, 2017
    Publication date: December 28, 2017
    Inventors: Yun Kyeong JANG, Sang Jin KIM, Dong Woon PARK, Joon Soo PARK, Chang Jae YANG, Kwang Sub YOON, Hye Kyoung JUE