Patents by Inventor Hye Yeon Yun

Hye Yeon Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Flash memory devices with selective bit line discharge paths and methods of operating the same
    Patent number: 8363482
    Abstract: Provided is a flash memory device that can include a memory cell configured to store data, a local bit line that is connected to the memory cell, a global bit line that is connected to the local bit line, a discharge transistor that is connected to the global bit line, and that is configured to selectively connect the global bit line to a reference level responsive to a discharge control signal, and a discharge control circuit, that is connected to the discharge transistor via the discharge control signal, and that is configured to selectively disable the discharge transistor during an erase interval occurring before a verify interval of an erase verification operation carried out by the flash memory device.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: January 29, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Euido Kim, BongYong Lee, Haebum Lee, Sang-Youl Kwon, Jin-Young Kim, Hye Yeon Yun, Houng-kuk Jang
  • FLASH MEMORY DEVICES WITH SELECTIVE BIT LINE DISCHARGE PATHS AND METHODS OF OPERATING THE SAME
    Publication number: 20110216602
    Abstract: Provided is a flash memory device that can include a memory cell configured to store data, a local bit line that is connected to the memory cell, a global bit line that is connected to the local bit line, a discharge transistor that is connected to the global bit line, and that is configured to selectively connect the global bit line to a reference level responsive to a discharge control signal, and a discharge control circuit, that is connected to the discharge transistor via the discharge control signal, and that is configured to selectively disable the discharge transistor during an erase interval occurring before a verify interval of an erase verification operation carried out by the flash memory device.
    Type: Application
    Filed: June 10, 2010
    Publication date: September 8, 2011
    Inventors: Euido Kim, Bong Yong Lee, Haebum Lee, Sang-Youl Kwon, Jin-Young Kim, Hye Yeon Yun, Houng-kuk Jang