Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.

Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.

Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.

Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.

Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.

Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.

Abstract: A method of fabricating a semiconductor package includes mounting a plurality of semiconductor chips on a substrate in a stripped state, forming a mold layer to cover the semiconductor chips, cutting the mold layer and the substrate to form unit packages separated from each other, and forming a shielding layer on the mold layer of each of the unit packages, wherein each of the unit packages includes a corresponding one of the semiconductor chips, wherein the mold layer in each of the unit packages includes side surfaces, a top surface, and corner regions, and wherein each of the corner regions of the mold layer includes a first corner, which is connected to a corresponding one of the side surfaces and has a first curvature radius, and a second corner, which is connected to the top surface and has a second curvature radius smaller than the first curvature radius.

Abstract: The present disclosure relates to a method of fabricating a semiconductor package. The method may include forming a cavity in a package substrate and providing the package substrate and a die on a carrier tape film. Here, the carrier tape film may include a tape substrate and an insulating layer on the tape substrate, and the die may be provided in the cavity of the package substrate. The method may further include subsequently forming an encapsulation layer to cover the insulating layer and the die in the cavity and cover the package substrate on the insulating layer and removing the tape substrate from the insulating layer.

Abstract: A method of fabricating a semiconductor package includes mounting a plurality of semiconductor chips on a substrate in a stripped state, forming a mold layer to cover the semiconductor chips, cutting the mold layer and the substrate to form unit packages separated from each other, and forming a shielding layer on the mold layer of each of the unit packages, wherein each of the unit packages includes a corresponding one of the semiconductor chips, wherein the mold layer in each of the unit packages includes side surfaces, a top surface, and corner regions, and wherein each of the corner regions of the mold layer includes a first corner, which is connected to a corresponding one of the side surfaces and has a first curvature radius, and a second corner, which is connected to the top surface and has a second curvature radius smaller than the first curvature radius.

Abstract: A method of fabricating a semiconductor package includes mounting a plurality of semiconductor chips on a substrate in a stripped state, forming a mold layer to cover the semiconductor chips, cutting the mold layer and the substrate to form unit packages separated from each other, and forming a shielding layer on the mold layer of each of the unit packages, wherein each of the unit packages includes a corresponding one of the semiconductor chips, wherein the mold layer in each of the unit packages includes side surfaces, a top surface, and corner regions, and wherein each of the corner regions of the mold layer includes a first corner, which is connected to a corresponding one of the side surfaces and has a first curvature radius, and a second corner, which is connected to the top surface and has a second curvature radius smaller than the first curvature radius.

Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.

Abstract: Provided are a semiconductor package. The semiconductor package comprises a redistribution substrate, an interconnect substrate on the redistribution substrate and including a hole penetrating therethrough and a recess region in a lower portion thereof, a semiconductor chip on the redistribution substrate and disposed in the hole of the interconnect substrate, and a molding layer covering the semiconductor chip and the interconnect substrate. The recess region is connected to the hole. The mold layer fills the recess region and a gap between the semiconductor chip and the interconnect substrate.

Abstract: The present disclosure relates to a method of fabricating a semiconductor package. The method may include forming a cavity in a package substrate and providing the package substrate and a die on a carrier tape film. Here, the carrier tape film may include a tape substrate and an insulating layer on the tape substrate, and the die may be provided in the cavity of the package substrate. The method may further include subsequently forming an encapsulation layer to cover the insulating layer and the die in the cavity and cover the package substrate on the insulating layer and removing the tape substrate from the insulating layer.

Abstract: A nanostructured hybrid particle, a manufacturing method thereof, and a device including the nanostructured hybrid particle are disclosed. The nanostructured hybrid particle includes a hydrophobic base particle having a convex-concave nanopattern on a surface thereof; a hydrophobic light-emitting nanoparticle disposed in a concave portion of the convex-concave nanopattern on the surface of hydrophobic base particle; and a coating layer covering the hydrophobic base particle and the hydrophobic light-emitting nanoparticle. In the nanostructured hybrid particle, light extraction may occur in all 3-dimensional directions, and thus, the nanostructured hybrid particle can exhibit high light extraction efficiency compared to light extraction occurring on a two-dimensional plane.

Abstract: A method of fabricating a semiconductor package includes mounting a plurality of semiconductor chips on a substrate in a stripped state, forming a mold layer to cover the semiconductor chips, cutting the mold layer and the substrate to form unit packages separated from each other, and forming a shielding layer on the mold layer of each of the unit packages, wherein each of the unit packages includes a corresponding one of the semiconductor chips, wherein the mold layer in each of the unit packages includes side surfaces, a top surface, and corner regions, and wherein each of the corner regions of the mold layer includes a first corner, which is connected to a corresponding one of the side surfaces and has a first curvature radius, and a second corner, which is connected to the top surface and has a second curvature radius smaller than the first curvature radius.

Abstract: A nanostructured hybrid particle, a manufacturing method thereof, and a device including the nanostructured hybrid particle are disclosed. The nanostructured hybrid particle includes a hydrophobic base particle having a convex-concave nanopattern on a surface thereof; a hydrophobic light-emitting nanoparticle disposed in a concave portion of the convex-concave nanopattern on the surface of hydrophobic base particle; and a coating layer covering the hydrophobic base particle and the hydrophobic light-emitting nanoparticle. In the nanostructured hybrid particle, light extraction may occur in all 3-dimensional directions, and thus, the nanostructured hybrid particle can exhibit high light extraction efficiency compared to light extraction occurring on a two-dimensional plane.