Patents by Inventor Hye Ji KIM
Hye Ji KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240150681Abstract: The present disclosure relates to a cleaning agent composition for a substrate for a semiconductor device and a method for cleaning a substrate for a semiconductor device using the same. The cleaning agent composition contains a silicon-based compound represented by Formula 1 and an aprotic organic solvent with a dielectric constant of 10 or less, which can form a surface protective film capable of preventing collapse of the pattern even in a wet cleaning process of fine patterns with high aspect ratios, thereby providing a method for manufacturing a semiconductor device with an improved semiconductor manufacturing yield.Type: ApplicationFiled: October 16, 2023Publication date: May 9, 2024Inventors: Hye Ji KIM, JinHo YOU, Hag Sung LEE, MyungHo LEE, Narae YIM, Yu jin HEO, Keon young KIM, Yun sun CHOI, Young mee KANG
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Publication number: 20240148856Abstract: Provided is a vaccine composition for preventing respiratory syncytial virus (RSV) infection, which is in the form of a liposome formulation including a RSV antigen, monophosphoryl lipid A (MLA), and/or a cobalt-porphyrin-phospholipid (CoPoP) conjugate. The vaccine composition exhibits excellent vaccine efficacy from a RSV antigen with enhanced immunogenicity and a combination of immune adjuvants for enhancing immune activity and antigen presentation.Type: ApplicationFiled: October 26, 2023Publication date: May 9, 2024Applicant: EUBIOLOGICS CO., LTD.Inventors: Chan Kyu LEE, Jonathan F. LOVELL, Yoon Hee WHANG, Woo Yeon HWANG, Hye Ji KIM, Min Chul PARK, Seok Kyu KIM, Wei-Chiao HUANG, Da Hui HA
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Patent number: 11969693Abstract: Provided is an ultra large-width coating device applied to a consecutive process. More particularly, the present invention relates to a coating device capable of maximizing productivity by consecutively manufacturing a large-width film without reducing physical properties of the manufactured film by overcoming a problem in that a coating width is limited during a coating process using the existing contact type coating roller, and a method for manufacturing an ultra large-width membrane using the same.Type: GrantFiled: April 20, 2021Date of Patent: April 30, 2024Assignees: SK INNOVATION CO., LTD., SK IE TECHNOLOGY CO., LTD.Inventors: Dong Jin Joo, Kyu Young Cho, Yun Bong Kim, Su Ji Lee, Won Sub Kwack, Hye Jin Kim
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Publication number: 20240120580Abstract: A sealing device for a pouch-type battery includes an upper sealing block and a lower sealing block. The upper sealing block has a two-stage upper sealing groove, including a first upper step and a second upper step, and the lower sealing block has a two-stage lower sealing groove, including a first lower step and a second lower step. The upper sealing block contacts a first surface of an electrode lead sealing part of the pouch-type battery, and the lower sealing block contacts a second surface of the electrode lead sealing part of the pouch-type battery in a process of performing sealing through heat fusion. A pouch-type battery having an electrode lead sealing part formed by the sealing device is also provided.Type: ApplicationFiled: November 17, 2022Publication date: April 11, 2024Applicant: LG Energy Solution, Ltd.Inventors: Seung Ho Na, Kwang Hee Choi, Dong Kyun Ha, Yoon Beom Lee, Do Woo Kim, Hye Ji Lee
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Publication number: 20240062809Abstract: Disclosed herein is an Artificial Intelligence (AI) processor. The AI processor includes multiple NVM AI cores for respectively performing basic unit operations required for a deep-learning operation based on data stored in NVM; SRAM for storing at least some of the results of the basic unit operations; and an AI core for performing an accumulation operation on the results of the basic unit operation.Type: ApplicationFiled: November 1, 2023Publication date: February 22, 2024Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jin-Ho HAN, Byung-Jo KIM, Ju-Yeob KIM, Hye-Ji KIM, Joo-Hyun LEE, Seong-Min KIM
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Patent number: 11842764Abstract: Disclosed herein is an Artificial Intelligence (AI) processor. The AI processor includes multiple NVM AI cores for respectively performing basic unit operations required for a deep-learning operation based on data stored in NVM; SRAM for storing at least some of the results of the basic unit operations; and an AI core for performing an accumulation operation on the results of the basic unit operation.Type: GrantFiled: December 7, 2021Date of Patent: December 12, 2023Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jin-Ho Han, Byung-Jo Kim, Ju-Yeob Kim, Hye-Ji Kim, Joo-Hyun Lee, Seong-Min Kim
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Publication number: 20230367553Abstract: Disclosed herein are an apparatus and method for a multiplication operation based on an outer product. The apparatus may include first internal calculators, each of which generates an intermediate accumulation value by performing a Multiply-Accumulate (MAC) operation, second internal calculators, each of which generates a chunking accumulation value using the intermediate accumulation value, and accumulation data transmission paths for enabling the output of any one of the first internal calculators to be input to any one of the second internal calculators.Type: ApplicationFiled: May 15, 2023Publication date: November 16, 2023Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventor: Hye-Ji KIM
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Patent number: 11735092Abstract: A display device includes first pixels partitioned into a plurality of blocks, each of the plurality of blocks being categorized as a first block or a second block, a sensor configured to generate first sensing data for at least two of the first pixels in each of the plurality of blocks during a first period, and a sensing controller configured to generate interpolated data for the first pixels that are not sensed by the sensor by interpolating the first sensing data, for the first block, and configured to forgo interpolation of the first sensing data, for the second block. The sensor generates second sensing data for the first pixels that are not sensed by the sensor, for the second block, during a second period after the first period.Type: GrantFiled: March 21, 2022Date of Patent: August 22, 2023Assignee: Samsung Display Co., Ltd.Inventors: Su Min Yang, Wook Lee, Hye Ji Kim, Ki Hyun Pyun
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Publication number: 20230259581Abstract: Disclosed herein is a method for outer-product-based matrix multiplication for a floating-point data type includes receiving first floating-point data and second floating-point data and performing matrix multiplication on the first floating-point data and the second floating-point data, and the result value of the matrix multiplication is calculated based on the suboperation result values of floating-point units.Type: ApplicationFiled: February 14, 2023Publication date: August 17, 2023Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Won JEON, Young-Su KWON, Ju-Yeob KIM, Hyun-Mi KIM, Hye-Ji KIM, Chun-Gi LYUH, Mi-Young LEE, Jae-Hoon CHUNG, Yong-Cheol CHO, Jin-Ho HAN
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Publication number: 20230197474Abstract: The present disclosure provides a heating unit capable of using a bush with holes and a substrate treating apparatus including the same. An apparatus for treating a substrate, includes a heating unit including a heating plate and configured to heat the substrate, a cooling unit configured to cool the substrate, and a transfer unit configured to move the substrate to the heating unit or the cooling unit, wherein the heating plate includes a first plate configured to provide a seating surface to the substrate, and a second plate disposed under the first plate and installed internally with heater(s) and bush(es), and wherein the bush has a hollow configured to provide a lift pin with a space of movement for allowing the lift pin to be elevated or lowered, and includes a plurality of holes formed to extend from the hollow in an outward direction.Type: ApplicationFiled: December 14, 2022Publication date: June 22, 2023Inventors: Dong Min CHOI, Hye Ji KIM
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Publication number: 20230017238Abstract: The present invention relates to a stripper composition for removing a photoresist in a process of manufacturing a semiconductor device. According to the present invention, it is possible to prevent corrosion of the underlying film while improving the peeling force for the photoresist, and to improve the stability of the composition over time.Type: ApplicationFiled: June 20, 2022Publication date: January 19, 2023Inventors: Hye Ji KIM, Jin Ho YOU, Namgi CHO
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Patent number: 11542577Abstract: A magnesium alloy sheet according to an embodiment of the present invention includes greater than 3 wt % and less than or equal to 5 wt % of Al, 0.5 wt % to 1.5 wt % of Zn, 0.1 wt % to 0.5 wt % of Mn, 0.001 wt % to 0.01 wt % of B, 0.1 wt % to 0.5 wt % of Y, a balance amount of magnesium, and other inevitable impurities on the basis of a total of 100 wt %.Type: GrantFiled: December 3, 2018Date of Patent: January 3, 2023Assignee: POSCO HOLDINGS INC.Inventors: Jae Sin Park, Taek Geun Lee, Dae Hwan Choi, Bae Mun Seo, Hye Ji Kim, Jonggeol Kim, Hye Jeong Kim, Yoonsuk Oh, Jae Eock Cho, Dong Kyun Choo
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Publication number: 20220215789Abstract: A display device includes first pixels partitioned into a plurality of blocks, each of the plurality of blocks being categorized as a first block or a second block, a sensor configured to generate first sensing data for at least two of the first pixels in each of the plurality of blocks during a first period, and a sensing controller configured to generate interpolated data for the first pixels that are not sensed by the sensor by interpolating the first sensing data, for the first block, and configured to forgo interpolation of the first sensing data, for the second block. The sensor generates second sensing data for the first pixels that are not sensed by the sensor, for the second block, during a second period after the first period.Type: ApplicationFiled: March 21, 2022Publication date: July 7, 2022Inventors: Su Min YANG, Wook LEE, Hye Ji KIM, Ki Hyun PYUN
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Publication number: 20220180919Abstract: Disclosed herein is an Artificial Intelligence (AI) processor. The AI processor includes multiple NVM AI cores for respectively performing basic unit operations required for a deep-learning operation based on data stored in NVM; SRAM for storing at least some of the results of the basic unit operations; and an AI core for performing an accumulation operation on the results of the basic unit operation.Type: ApplicationFiled: December 7, 2021Publication date: June 9, 2022Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jin-Ho HAN, Byung-Jo KIM, Ju-Yeob KIM, Hye-Ji KIM, Joo-Hyun LEE, Seong-Min KIM
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Patent number: 11282433Abstract: A display device includes first pixels partitioned into a plurality of blocks, each of the plurality of blocks being categorized as a first block or a second block, a sensor configured to generate first sensing data for at least two of the first pixels in each of the plurality of blocks during a first period, and a sensing controller configured to generate interpolated data for the first pixels that are not sensed by the sensor by interpolating the first sensing data, for the first block, and configured to forgo interpolation of the first sensing data, for the second block. The sensor generates second sensing data for the first pixels that are not sensed by the sensor, for the second block, during a second period after the first period.Type: GrantFiled: August 5, 2020Date of Patent: March 22, 2022Inventors: Su Min Yang, Wook Lee, Hye Ji Kim, Ki Hyun Pyun
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Publication number: 20210150966Abstract: A display device includes first pixels partitioned into a plurality of blocks, each of the plurality of blocks being categorized as a first block or a second block, a sensor configured to generate first sensing data for at least two of the first pixels in each of the plurality of blocks during a first period, and a sensing controller configured to generate interpolated data for the first pixels that are not sensed by the sensor by interpolating the first sensing data, for the first block, and configured to forgo interpolation of the first sensing data, for the second block. The sensor generates second sensing data for the first pixels that are not sensed by the sensor, for the second block, during a second period after the first period.Type: ApplicationFiled: August 5, 2020Publication date: May 20, 2021Inventors: Su Min YANG, Wook LEE, Hye Ji KIM, Ki Hyun PYUN
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Publication number: 20210140017Abstract: A magnesium alloy sheet according to an embodiment of the present invention includes greater than 3 wt % and less than or equal to 5 wt % of Al, 0.5 wt % to 1.5 wt % of Zn, 0.1 wt % to 0.5 wt % of Mn, 0.001 wt % to 0.01 wt % of B, 0.1 wt % to 0.5 wt % of Y, a balance amount of magnesium, and other inevitable impurities on the basis of a total of 100 wt %.Type: ApplicationFiled: December 3, 2018Publication date: May 13, 2021Inventors: Jae Sin Park, Taek Geun Lee, Dae Hwan Choi, Bae Mun Seo, Hye Ji Kim, Jonggeol Kim, Hye Jeong Kim, Yoonsuk Oh, Jae Eock Cho, Dong Kyun Choo
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Patent number: 10067821Abstract: An apparatus and method for cyclic redundancy check device is provided. The apparatus includes a multiplicity of sub-block CRC parts configured to receive a bit sequence from each sub-block of a transport block that is divided into a multiplicity of sub-blocks and to perform CRC, and a Galois field adding part configured to add second codes, which are output from the multiplicity of sub-block CRC parts, in a Galois field, wherein each sub-block CRC part includes a Galois field multiplying part configured to generate a weight bit sequence by multiplying a first code, which is obtained from CRC calculation of a sub-block weight code that represents a weight allocated to each sub-block, and the bit sequence in the Galois field, and a linear feedback shift register including n-numbered registers and configured to output the second code by adding the weight bit sequence to each register in the Galois field.Type: GrantFiled: June 16, 2016Date of Patent: September 4, 2018Assignee: CENTER FOR INTEGRATED SMART SENSORS FOUNDATIONInventors: Hye Ji Kim, Ji Hoon Kim
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Patent number: 9613821Abstract: Provided are a method of forming patterns and a method of manufacturing an integrated circuit device. In the method of forming patterns, a photoresist pattern having a first opening exposing a first region of a target layer is formed. A capping layer is formed at sidewalls of the photoresist pattern defining the first opening. An insoluble region is formed around the first opening by diffusing acid from the capping layer to the inside of the photoresist pattern. A second opening exposing a second region of the target layer is formed by removing a soluble region spaced apart from the first opening, with the insoluble region being interposed therebetween. The target layer is etched using the insoluble region as an etch mask.Type: GrantFiled: April 24, 2015Date of Patent: April 4, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yool Kang, Dong-won Kim, Ju-young Kim, Tae-hoon Kim, Hye-ji Kim, Su-min Park, Hyung-rae Lee
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Publication number: 20160371142Abstract: An apparatus and method for cyclic redundancy check device is provided. The apparatus includes a multiplicity of sub-block CRC parts configured to receive a bit sequence from each sub-block of a transport block that is divided into a multiplicity of sub-blocks and to perform CRC, and a Galois field adding part configured to add second codes, which are output from the multiplicity of sub-block CRC parts, in a Galois field, wherein each sub-block CRC part includes a Galois field multiplying part configured to generate a weight bit sequence by multiplying a first code, which is obtained from CRC calculation of a sub-block weight code that represents a weight allocated to each sub-block, and the bit sequence in the Galois field, and a linear feedback shift register including n-numbered registers and configured to output the second code by adding the weight bit sequence to each register in the Galois field.Type: ApplicationFiled: June 16, 2016Publication date: December 22, 2016Inventors: Hye Ji KIM, Ji Hoon KIM