Patents by Inventor Hyeng Woo EOM

Hyeng Woo EOM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method for fabricating the same
    Patent number: 11935926
    Abstract: A method for fabricating a semiconductor device includes forming a stack structure including a horizontal recess over a substrate, forming a blocking layer lining the horizontal recess, forming an interface control layer including a dielectric barrier element and a conductive barrier element over the blocking layer, and forming a conductive layer over the interface control layer to fill the horizontal recess.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: March 19, 2024
    Assignee: SK hynix Inc.
    Inventors: Hyeng-Woo Eom, Jung-Myoung Shim, Young-Ho Yang, Kwang-Wook Lee, Won-Joon Choi
  • Semiconductor device and method for fabricating the same
    Patent number: 11588026
    Abstract: A method for fabricating a semiconductor device includes forming a stack structure including a horizontal recess over a substrate, forming a blocking layer lining the horizontal recess, forming an interface control layer including a dielectric barrier element and a conductive barrier element over the blocking layer, and forming a conductive layer over the interface control layer to fill the horizontal recess.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: February 21, 2023
    Assignee: SK hynix Inc.
    Inventors: Hyeng-Woo Eom, Jung-Myoung Shim, Young-Ho Yang, Kwang-Wook Lee, Won-Joon Choi
  • SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
    Publication number: 20200388686
    Abstract: A method for fabricating a semiconductor device includes forming a stack structure including a horizontal recess over a substrate, forming a blocking layer lining the horizontal recess, forming an interface control layer including a dielectric barrier element and a conductive barrier element over the blocking layer, and forming a conductive layer over the interface control layer to fill the horizontal recess.
    Type: Application
    Filed: January 13, 2020
    Publication date: December 10, 2020
    Inventors: Hyeng-Woo EOM, Jung-Myoung SHIM, Young-Ho YANG, Kwang-Wook LEE, Won-Joon CHOI
  • Method of manufacturing semiconductor device
    Patent number: 10714499
    Abstract: The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: July 14, 2020
    Assignee: SK hynix Inc.
    Inventors: Won Joon Choi, Min Sung Ko, Kyeong Bae Kim, Jong Gi Kim, Dong Sun Sheen, Jung Myoung Shim, Young Ho Yang, Hyeng Woo Eom, Kwang Wook Lee, Woo Jae Chung
  • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20190319045
    Abstract: The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.
    Type: Application
    Filed: June 25, 2019
    Publication date: October 17, 2019
    Inventors: Won Joon CHOI, Min Sung KO, Kyeong Bae KIM, Jong Gi KIM, Dong Sun SHEEN, Jung Myoung SHIM, Young Ho YANG, Hyeng Woo EOM, Kwang Wook LEE, Woo Jae CHUNG
  • Method of manufacturing semiconductor device through by-product removal from conductive layer
    Patent number: 10373973
    Abstract: The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: August 6, 2019
    Assignee: SK hynix Inc.
    Inventors: Won Joon Choi, Min Sung Ko, Kyeong Bae Kim, Jong Gi Kim, Dong Sun Sheen, Jung Myoung Shim, Young Ho Yang, Hyeng Woo Eom, Kwang Wook Lee, Woo Jae Chung
  • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20190081066
    Abstract: The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.
    Type: Application
    Filed: April 24, 2018
    Publication date: March 14, 2019
    Inventors: Won Joon CHOI, Min Sung KO, Kyeong Bae KIM, Jong Gi KIM, Dong Sun SHEEN, Jung Myoung SHIM, Young Ho YANG, Hyeng Woo EOM, Kwang Wook LEE, Woo Jae CHUNG