Abstract: A memory device comprises a command decoding unit configured to generate a command by decoding an input signal applied to a first pad, wherein whether the command decoding unit is to be disabled is selected based on whether an operating state signal is activated, an operating state control unit configured to activate or deactivate the operating state signal in response to a set signal applied to the first pad, and an internal operation execution unit configured to perform a set internal operation in response to the command.

Abstract: A memory device may include a data receiver configured to receive a plurality of read data chunks from a plurality of memory areas which transmit and receive data through one channel, a data compressor configured to generate a plurality of compressed data chunks from each of the plurality of read data chunks and a data output unit configured to simultaneously output the plurality of compressed data through the channel in response to a data output command.

Abstract: A storage device may include: a memory device for extracting bits having a first logic value among bits included in data received from outside the memory device, generating a plurality of compressed data chunks including the bits comprising the first logic value and position information representing positions of the bits having the first logic value in the data, and outputting the plurality of compressed data chunks in response to a data output command; and a memory controller for receiving the plurality of compressed data chunks from the memory device, and recovering the data, based on the bits having the first logic value, which are included in the plurality of compressed data, and the position information.