Abstract: A secondary battery includes an electrode assembly; a case accommodating the electrode assembly; and a cap plate coupled to an upper opening of the case, wherein the cap plate includes a vent, the vent including a vent hole passing through a central area of the cap plate and a vent plate coupled to the vent hole, the vent plate includes an upper vent plate fixed in position to an upper end of the cap plate; and a lower vent plate fixed in position to a lower end of the cap plate, and the upper vent plate and the lower vent plate are spaced apart from each other with an insulating layer therebetween.

Abstract: There is provided a binder for a secondary battery anode, in which double-bond functional groups are selectively formed in a fluorine-based polymer by using an organic catalyst, and a cross-linked structure can be formed by the double bonds through only an electrode drying process without the introduction of a heterogeneous additive.

Abstract: Disclosed is a device for maintaining consistency between a host system cache and a main memory in a general-purpose computing system equipped with a hardware accelerator for processing main memory data. The device for maintaining data consistency between a hardware accelerator and a host system, which is at least temporarily implemented by a computer, includes a determination unit responsible for determining whether an address which the hardware accelerator should access is present in a cache, and a processing unit responsible for selectively performing write-back on data corresponding to the address when the address is present in the cache based on the determined result.

Abstract: Disclosed is a main memory capable of speeding up a hardware accelerator and saving memory space. The main memory according to the present disclosure is at least temporarily implemented by a computer and includes a memory, and an accelerator responsible for performing an operation for hardware acceleration while sharing the storage space of a host processor and the memory.

Abstract: Disclosed is a device for maintaining consistency between a host system cache and a main memory in a general-purpose computing system equipped with a hardware accelerator for processing main memory data. The device for maintaining data consistency between a hardware accelerator and a host system, which is at least temporarily implemented by a computer, includes a determination unit responsible for determining whether an address which the hardware accelerator should access is present in a cache, and a processing unit responsible for selectively performing write-back on data corresponding to the address when the address is present in the cache based on the determined result.

Abstract: Disclosed is a main memory capable of speeding up a hardware accelerator and saving memory space. The main memory according to the present disclosure is at least temporarily implemented by a computer and includes a memory, and an accelerator responsible for performing an operation for hardware acceleration while sharing the storage space of a host processor and the memory.

Abstract: A data storage device includes a first memory device configured to store data having a first property, and a second memory device including a first block configured to store data having a second property and a second block configured to store data transferred from the first memory device.

Abstract: A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.

Abstract: A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.

Abstract: A data storage device includes a first memory device configured to store data having a first property, and a second memory device including a first block configured to store data having a second property and a second block configured to store data transferred from the first memory device.