Abstract: A display device includes a display panel; and a circuit board bonded to the display panel. The display panel includes: a substrate; a circuit layer disposed on the substrate; and an element layer disposed on the circuit layer. The substrate includes a main region and a sub-region. The circuit layer includes light emitting pixel drivers arranged side by side with each other in a first direction and a second direction; first power lines extending in the second direction, and transmitting a first power to the light emitting pixel drivers; a power sensing line extending from a first side of an edge portion of the display area to the sub-region, and electrically connected to a corresponding first power line of the first power lines; and a power sensing extension line electrically connected to the power sensing line and in contact with a side of an edge portion of the sub-region.

Abstract: A test panel includes: a pixel; a first test element connected to the pixel, the first test element including a gate electrode, a semiconductor layer, a first electrode, and a second electrode connected to the pixel; a test pad spaced apart from the first test element; a first connecting line connected to the first test element and the test pad; and a first resistive layer in a same layer as the semiconductor layer and connecting the first electrode and the first connecting line spaced apart from each other.

Abstract: A display device according to one or more embodiments includes a display device including a substrate including a display area and a non-display area, pixels in the display area above the substrate, an electrostatic discharge circuit in the non-display area above the substrate, a first line in the non-display area above the substrate, and configured to receive a first voltage, a second line in the non-display area above the substrate, and configured to receive a second voltage that is lower than the first voltage, a first connection line connected between the first line and the electrostatic discharge circuit under the first line on the substrate, and a second connection line connected between the second line and the electrostatic discharge circuit under the second line on the substrate.

Abstract: An input sensing device including: a power line; driving lines; a first signal line including sub-lines; a second signal line connected to the sub-lines; and sensor pixels connected to the power line, the driving lines, and the first signal line, wherein at least one sensor pixel of the sensor pixels includes: an optical sensor that transfers a photoelectrically converted charge from the power line to a first node in response to a driving signal provided through a first driving line of the driving lines; a first transistor connected between the first node and a first sub-line among the sub-lines, wherein the first transistor includes a gate electrode connected to the first driving line; and a second transistor connected between the first node and a second sub-line among the sub-lines, wherein the second transistor includes a gate electrode connected to the first driving line.

Abstract: An input sensing device including: a power line; driving lines; a first signal line including sub-lines; a second signal line connected to the sub-lines; and sensor pixels connected to the power line, the driving lines, and the first signal line, wherein at least one sensor pixel of the sensor pixels includes: an optical sensor that transfers a photoelectrically converted charge from the power line to a first node in response to a driving signal provided through a first driving line of the driving lines; a first transistor connected between the first node and a first sub-fine among the sub-lines, wherein the first transistor includes a gate electrode connected to the first driving line; and a second transistor connected between the first node and a second sub-line among the sub-lines, wherein the second transistor includes a gate electrode connected to the first driving line,

Abstract: An input sensing device including: a power line; driving lines; a first signal line including sub-lines; a second signal line connected to the sub-lines; and sensor pixels connected to the power line, the driving lines, and the first signal line, wherein at least one sensor pixel of the sensor pixels includes: an optical sensor that transfers a photoelectrically converted charge from the power line to a first node in response to a driving signal provided through a first driving line of the driving lines; a first transistor connected between the first node and a first sub-line among the sub-lines, wherein the first transistor includes a gate electrode connected to the first driving line; and a second transistor connected between the first node and a second sub-line among the sub-lines, wherein the second transistor includes a gate electrode connected to the first driving line.

Abstract: A display device includes a display unit displaying an image, a fingerprint sensing unit disposed on one surface of the display unit and including fingerprint sensing pixels to sense a fingerprint, and a readout circuit providing a selection signal to the fingerprint sensing unit to select a predetermined amount of fingerprint sensing pixels from the fingerprint sensing pixels as a sensing area and receiving a fingerprint sensing signal from the sensing area. The readout circuit accumulates the fingerprint sensing signal provided from the fingerprint sensing pixels in the sensing area during a test mode and calculates a compensation value based on a difference between the accumulated fingerprint sensing signal and a reference value.

Abstract: An input sensing device including: a power line; driving lines; a first signal line including sub-lines; a second signal line connected to the sub-lines; and sensor pixels connected to the power line, the driving lines, and the first signal line, wherein at least one sensor pixel of the sensor pixels includes: an optical sensor that transfers a photoelectrically converted charge from the power line to a first node in response to a driving signal provided through a first driving line of the driving lines; a first transistor connected between the first node and a first sub-line among the sub-lines, wherein the first transistor includes a gate electrode connected to the first driving line; and a second transistor connected between the first node and a second sub-line among the sub-lines, wherein the second transistor includes a gate electrode connected to the first driving line.

Abstract: A display device includes a display unit displaying an image, a fingerprint sensing unit disposed on one surface of the display unit and including fingerprint sensing pixels to sense a fingerprint, and a readout circuit providing a selection signal to the fingerprint sensing unit to select a predetermined amount of fingerprint sensing pixels from the fingerprint sensing pixels as a sensing area and receiving a fingerprint sensing signal from the sensing area. The readout circuit accumulates the fingerprint sensing signal provided from the fingerprint sensing pixels in the sensing area during a test mode and calculates a compensation value based on a difference between the accumulated fingerprint sensing signal and a reference value.

Abstract: A display apparatus includes a display panel including a plurality of first gate lines, a first gate driver connected to first ends of the plurality of first gate lines, a second gate driver connected to second ends of the plurality of first gate lines, a feedback line connected adjacent to the first end of one of the plurality of first gate lines, and a gate delay sensing circuit connected to the feedback line. The gate delay sensing circuit includes a time-to-digital converter and a digital comparator. The time-to-digital converter converts an activation time of a feedback gate signal into a digital activation value. The feedback gate signal is retrieved from the feedback line. The digital comparator generates a digital delay value based on the digital activation value. The digital delay value indicates resistive-capacitive (“RC”) delay of the one of the plurality of first gate lines connected to the feedback line.

Abstract: A display apparatus includes a display panel including a plurality of first gate lines, a first gate driver connected to first ends of the plurality of first gate lines, a second gate driver connected to second ends of the plurality of first gate lines, a feedback line connected adjacent to the first end of one of the plurality of first gate lines, and a gate delay sensing circuit connected to the feedback line. The gate delay sensing circuit includes a time-to-digital converter and a digital comparator. The time-to-digital converter converts an activation time of a feedback gate signal into a digital activation value. The feedback gate signal is retrieved from the feedback line. The digital comparator generates a digital delay value based on the digital activation value. The digital delay value indicates resistive-capacitive (“RC”) delay of the one of the plurality of first gate lines connected to the feedback line.

Abstract: The present disclosure relates to a display device. The display device according to an exemplary embodiment includes a display area comprising a plurality of pixels, a peripheral area that is disposed outside the display area, and a wiring portion in the peripheral area. The wiring portion includes a plurality of signal lines that are adjacent to each other and are arranged along a first direction and each extends in a second direction that is different from the first direction. The plurality of signal lines are arranged in an order of average voltages of signals respectively transmitted by the plurality of signal lines during one frame.

Abstract: A display apparatus includes a display panel including a plurality of first gate lines, a first gate driver connected to first ends of the plurality of first gate lines, a second gate driver connected to second ends of the plurality of first gate lines, a feedback line connected adjacent to the first end of one of the plurality of first gate lines, and a gate delay sensing circuit connected to the feedback line. The gate delay sensing circuit includes a time-to-digital converter and a digital comparator. The time-to-digital converter converts an activation time of a feedback gate signal into a digital activation value. The feedback gate signal is retrieved from the feedback line. The digital comparator generates a digital delay value based on the digital activation value. The digital delay value indicates resistive-capacitive (“RC”) delay of the one of the plurality of first gate lines connected to the feedback line.

Abstract: The present disclosure relates to a display device. The display device according to an exemplary embodiment includes a display area comprising a plurality of pixels, a peripheral area that is disposed outside the display area, and a wiring portion in the peripheral area. The wiring portion includes a plurality of signal lines that are adjacent to each other and are arranged along a first direction and each extends in a second direction that is different from the first direction. The plurality of signal lines are arranged in an order of average voltages of signals respectively transmitted by the plurality of signal lines during one frame.

Abstract: A display apparatus includes a display panel including a plurality of first gate lines, a first gate driver connected to first ends of the plurality of first gate lines, a second gate driver connected to second ends of the plurality of first gate lines, a feedback line connected adjacent to the first end of one of the plurality of first gate lines, and a gate delay sensing circuit connected to the feedback line. The gate delay sensing circuit includes a time-to-digital converter and a digital comparator. The time-to-digital converter converts an activation time of a feedback gate signal into a digital activation value. The feedback gate signal is retrieved from the feedback line. The digital comparator generates a digital delay value based on the digital activation value. The digital delay value indicates resistive-capacitive (“RC”) delay of the one of the plurality of first gate lines connected to the feedback line.

Abstract: An image signal modifying method is disclosed. In one aspect, the image signal modifying method includes inputting a gray level interval of a first dynamic capacitance compensation (DCC) lookup table to a current gray level which is a target in a previous image signal when it is overdriven (DTG) and 0 to a gray level of the previous image signal (PIG). The method also includes searching for a data value in an adaptive color correction (ACC) lookup table corresponding to a gray level equal to a numerical value of the DTG (ALT) and performing an algorithm based on the DTG, the ALT, and the gray level interval of the first DCC lookup table. The method further includes generating a second DCC lookup table based on the algorithm, and performing second DCC processing on the input image signal based on the second DCC lookup table.

Abstract: A display device may include a display panel that includes a first region and a second region. The display device may include a controller that may receive a first gamma value and a second gamma value, use the first gamma value or a third gamma value to generate first image data, use the first gamma value and the second gamma value to generate a fourth gamma value, and use the fourth gamma value to generate second image data. The display device may include a data driver that may use the first image data and the second image data to generate a first data voltage set and a second data voltage set. The first region may use the first data voltage set to display a first portion of an image. The second region may use the second data voltage set to display a second portion of the image.

Abstract: A display device may include a display panel that includes a first region and a second region. The display device may include a controller that may receive a first gamma value and a second gamma value, use the first gamma value or a third gamma value to generate first image data, use the first gamma value and the second gamma value to generate a fourth gamma value, and use the fourth gamma value to generate second image data. The display device may include a data driver that may use the first image data and the second image data to generate a first data voltage set and a second data voltage set. The first region may use the first data voltage set to display a first portion of an image. The second region may use the second data voltage set to display a second portion of the image.

Abstract: An image signal modifying method is disclosed. In one aspect, the image signal modifying method includes inputting a gray level interval of a first dynamic capacitance compensation (DCC) lookup table to a current gray level which is a target in a previous image signal when it is overdriven (DTG) and 0 to a gray level of the previous image signal (PIG). The method also includes searching for a data value in an adaptive color correction (ACC) lookup table corresponding to a gray level equal to a numerical value of the DTG (ALT) and performing an algorithm based on the DTG, the ALT, and the gray level interval of the first DCC lookup table. The method further includes generating a second DCC lookup table based on the algorithm, and performing second DCC processing on the input image signal based on the second DCC lookup table.