Patents by Inventor Hyeon-Hwan Kim

Hyeon-Hwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10558078
    Abstract: A polarizing layer includes a substrate and a plurality of parallel wires disposed on the substrate. Each of the plurality of wires includes a base layer disposed on the substrate and an anti-reflective layer disposed on the base layer. The base layer includes aluminum or an aluminum alloy. The anti-reflective layer has a thickness within a range of 12 nm to 40 nm.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: February 11, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung In Baek, Hyun Eok Shin, Su Jin Choi, Sang Gab Kim, Ji Hun Kim, Hyeon Hwan Kim, Jung Gun Nam, Young Eun Park, Joon Yong Park, Jin Ho Park, Gyung Min Baek, Yun Jong Yeo, Gug Rae Jo, Hyun Ji Ha, Youn Ho Han
  • Patent number: 10504473
    Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: December 10, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung-Man Kim, Hong-Woo Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Jong-Hyuk Lee
  • Publication number: 20180364521
    Abstract: A polarizing layer includes a substrate and a plurality of parallel wires disposed on the substrate. Each of the plurality of wires includes a base layer disposed on the substrate and an anti-reflective layer disposed on the base layer. The base layer includes aluminum or an aluminum alloy. The anti-reflective layer has a thickness within a range of 12 nm to 40 nm.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 20, 2018
    Inventors: Seung In Baek, Hyun Eok Shin, Su Jin Choi, Sang Gab Kim, Ji Hun Kim, Hyeon Hwan Kim, Jung Gun NAM, Young Eun Park, Joon Yong Park, Jin Ho Park, Gyung Min Baek, Yun Jong Yeo, Gug Rae Jo, Hyun Ji Ha, Youn Ho Han
  • Publication number: 20180075818
    Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
    Type: Application
    Filed: November 16, 2017
    Publication date: March 15, 2018
    Inventors: Sung-Man KIM, Hong-Woo LEE, Jong-Hwan LEE, Hyeon-Hwan KIM, Jong-Hyuk LEE
  • Patent number: 9824661
    Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: November 21, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung-Man Kim, Hong-Woo Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Jong-Hyuk Lee
  • Publication number: 20160322016
    Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
    Type: Application
    Filed: June 28, 2016
    Publication date: November 3, 2016
    Inventors: Sung-Man KIM, Hong-Woo LEE, Jong-Hwan LEE, Hyeon-Hwan KIM, Jong-Hyuk LEE
  • Patent number: 9401118
    Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: July 26, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung-Man Kim, Hong-Woo Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Jong-Hyuk Lee
  • Patent number: 8565370
    Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: October 22, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hong-Woo Lee, Sung-Man Kim, Jong-Hyuk Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Sang-Moon Moh, Jeong-Il Kim, Yeon-Kyu Moon
  • Publication number: 20130002309
    Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 3, 2013
    Inventors: HONG-WOO LEE, Sung-Man Kim, Jong-Hyuk Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Sang-Moon Moh, Jeong-Il Kim, Yeon-Kyu Moon
  • Patent number: 8306177
    Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: November 6, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hong-Woo Lee, Sung-Man Kim, Jong-Hyuk Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Sang-Moon Moh, Jeong-Il Kim, Yeon-Kyu Moon
  • Patent number: 8264443
    Abstract: A gate driving circuit includes stages, the stages being cascaded and each including: a pull-up part which pulls up a gate voltage to a clock signal during a horizontal scanning period (1H); a carry part which pulls up a carry voltage to the clock signal during the horizontal scanning period (1H); a pull-up driving part connected to a control terminal (Q-node) common to the carry part and the pull-up part and which receives a previous carry voltage from a first previous stage to turn on the pull-up part and the carry part; and a ripple preventing part which prevents a ripple generated at a previous Q-node of a second previous stage based on a ripple generated at the Q-node of the carry part and the pull-up part.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 11, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Woo Lee, Hyeon-Hwan Kim, Byeong-Jae Ahn, Sun-Hyung Kim, Sung-Man Kim, Bong-Jun Lee
  • Patent number: 8111342
    Abstract: A display substrate that has increased aperture ratio is presented. The display substrate includes a base substrate, a first metal pattern formed on the base substrate and a gate wiring and a gate electrode. A first insulating layer is formed on the base substrate covering the first metal pattern. A second metal pattern is formed on the first insulating layer including a data wiring crossing the gate wiring, a source electrode connected to the data wiring and a drain electrode separated from the source electrode. A second insulating layer is formed on the base substrate covering the second metal pattern. A transparent electrode is formed on the second insulating layer. An organic layer is formed on the transparent electrode, and a pixel electrode is formed on the organic layer being insulated with the transparent electrode, and contacted to the drain electrode. The organic layer may comprise red, green and blue color filters.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: February 7, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-Tack Kang, Jong-Huan Lee, Hong-Woo Lee, Hyeon-Hwan Kim, Byeong-Jae Ahn, Gyu-Tae Kim, Jong-Woong Chang, Jong-Hyuk Lee
  • Publication number: 20100156954
    Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
    Type: Application
    Filed: October 23, 2009
    Publication date: June 24, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Man KIM, Hong-Woo LEE, Jong-Hwan LEE, Hyeon-Hwan KIM, Jong-Hyuk LEE
  • Publication number: 20100158188
    Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.
    Type: Application
    Filed: October 8, 2009
    Publication date: June 24, 2010
    Inventors: Hong-Woo LEE, Sung-Man KIM, Jong-Hyuk LEE, Jong-Hwan LEE, Hyeon-Hwan KIM, Sang-Moon MOH, Jeong-Il KIM, Yeon-Kyu MOON
  • Publication number: 20090189677
    Abstract: A gate driving circuit includes stages, the stages being cascaded and each including: a pull-up part which pulls up a gate voltage to a clock signal during a horizontal scanning period (1H); a carry part which pulls up a carry voltage to the clock signal during the horizontal scanning period (1H); a pull-up driving part connected to a control terminal (Q-node) common to the carry part and the pull-up part and which receives a previous carry voltage from a first previous stage to turn on the pull-up part and the carry part; and a ripple preventing part which prevents a ripple generated at a previous Q-node of a second previous stage based on a ripple generated at the Q-node of the carry part and the pull-up part.
    Type: Application
    Filed: September 30, 2008
    Publication date: July 30, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Hong-Woo LEE, Hyeon-Hwan KIM, Byeong-Jae AHN, Sun-Hyung KIM, Sung-Man KIM, Bong-Jun LEE
  • Publication number: 20080297677
    Abstract: A display substrate that has increased aperture ratio is presented. The display substrate includes a base substrate, a first metal pattern formed on the base substrate and a gate wiring and a gate electrode. A first insulating layer is formed on the base substrate covering the first metal pattern. A second metal pattern is formed on the first insulating layer including a data wiring crossing the gate wiring, a source electrode connected to the data wiring and a drain electrode separated from the source electrode. A second insulating layer is formed on the base substrate covering the second metal pattern. A transparent electrode is formed on the second insulating layer. An organic layer is formed on the transparent electrode, and a pixel electrode is formed on the organic layer being insulated with the transparent electrode, and contacted to the drain electrode. The organic layer may comprise red, green and blue color filters.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 4, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shin-Tack KANG, Hong-Woo LEE, Hyeon-Hwan KIM, Gyu-Tae KIM
  • Patent number: 7291860
    Abstract: A gate line extending in a horizontal direction is formed on an insulating substrate, and a data line is formed perpendicular to the gate line defining a pixel of a matrix array. Pixel electrodes receiving image signals through the data line are formed in a pixel, and a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode is formed on the portion where the gate lines and the data lines intersect. A storage wire including a storage electrode line in the horizontal direction, a storage electrode connected to the storage electrode line, and at least one of the storage electrode connection portions connecting storage electrodes of neighboring pixels is formed in the same direction as the gate line.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: November 6, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol-Soo Jung, Young-Sun Kim, Ho-Joon Lee, Yeong-Hwan Cho, Hyeon-Hwan Kim, Bung-Hyuk Min, Woon-Yong Park, Il-Gon Kim, Jang-Soo Kim, Jin-Oh Kwag, Seog-Chae Lee
  • Patent number: 7130003
    Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: October 31, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Hyeon-Hwan Kim, Dong-Hyeon Ki
  • Publication number: 20050208711
    Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.
    Type: Application
    Filed: May 11, 2005
    Publication date: September 22, 2005
    Inventors: Woon-Yong Park, Hyeon-Hwan Kim, Dong-Hyeon Ki
  • Patent number: 6906776
    Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: June 14, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Hyeon-Hwan Kim, Dong-Hyeon Ki