Abstract: Lead frames for semiconductor chips include spaced apart tie-bars which extend to contact and support the semiconductor chip. Adhesive is used between the tie-bars and the chip to adhesively couple the tie-bars to the chip. The lead frame leads therefore need not be used to adhesively couple the chip to the lead frame, thereby reducing or eliminating the need for equal spacing and close coupling of the leads, and reducing or preventing problems caused by deterioration of adhesive on the leads. The tie-bars may include polyimide tape or liquid adhesive held in cups. During fabrication, a semiconductor chip is mounted on the adhesive material, such that the tie-bars mechanically support the semiconductor chip and the lead ends extend adjacent the semiconductor chip. The lead ends are then electrically connected to the semiconductor chip and the package is encapsulated.

Abstract: A semiconductor chip package includes a semiconductor chip, a lead frame including a plurality of inner leads each having a wire bonding point on a top surface, bonding wires for electrically interconnecting the semiconductor chip to each of the plurality of inner leads, and a molding compound for encapsulating the semiconductor chip and the inner leads. Each of the plurality of inner leads of the lead frame has a means for locking movement of the molding compound against the top surfaces of the inner leads, and the locking means, for example a linear groove, down set feature of the inner lead or second wire ball, is placed in close proximity to the wire bonding.

Abstract: A three dimensional stack package device that can realize vertical electrical interconnection of the stacked individual package devices without a cost increase or additional complicated processing steps.