Patents by Inventor Hyeon Joo SEUL

Hyeon Joo SEUL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942553
    Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: March 26, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Kyeong Jeong, Yun Heub Song, Chang Hwan Choi, Hyeon Joo Seul
  • Publication number: 20230253504
    Abstract: A thin-film transistor comprises a substrate; an insulating layer formed on the substrate; an active layer formed on the insulating layer; and source and drain electrode layers formed on the active layer so as to be spaced from each other, wherein the active layer comprises: a first oxide semiconductor layer consisting of In, Ga and O; and a second oxide semiconductor layer which is formed on the first oxide semiconductor layer and which consists of Zn and O. The thin-film transistor having metal oxide semiconductor layers of a heterojunction structure has greatly improved electron mobility by comprising, as an active layer, oxide semiconductor layers of a heterojunction structure. In addition, the physical properties of a thin-film transistor to be manufactured can be controlled by adjusting the composition and thickness of oxide semiconductor layers through an atomic layer deposition (ALD) process.
    Type: Application
    Filed: June 23, 2021
    Publication date: August 10, 2023
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jae Kyeong JEONG, Hyeon Joo SEUL
  • Patent number: 11588057
    Abstract: A thin film transistor and a non-volatile memory device are provided. The thin film transistor comprises a gate electrode, and a metal oxide channel layer traversing the upper or lower portions of the gate electrode. The metal oxide channel layer has semiconductor properties while having bixbyite crystals. An insulating layer is disposed between the gate electrode and the metal oxide channel layer. Source and drain electrodes are electrically connected to both ends of the metal oxide channel layer, respectively.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: February 21, 2023
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jae Kyeong Jeong, Hyun Ji Yang, Hyeon Joo Seul
  • Publication number: 20220367721
    Abstract: Provided is a semiconductor memory device comprising a bit line extending in a first direction, a channel pattern on the bit line and including a first oxide semiconductor layer in contact with the bit line and a second oxide semiconductor layer on the first oxide semiconductor layer, wherein each of the first and second oxide semiconductor layers includes a horizontal part parallel to the bit line and first and second vertical parts that vertically protrude from the horizontal part, first and second word lines between the first and second vertical parts of the second oxide semiconductor layer and on the horizontal part of the second oxide semiconductor layer, and a gate dielectric pattern between the channel pattern and the first and second word lines. A thickness of the second oxide semiconductor layer is greater than that of the first oxide semiconductor layer.
    Type: Application
    Filed: March 15, 2022
    Publication date: November 17, 2022
    Applicants: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation Hanyang University
    Inventors: Jae Kyeong JEONG, Min Tae RYU, Hyeon Joo SEUL, Sungwon YOO, Wonsok LEE, Min Hee CHO, Jae Seok HUR
  • Publication number: 20210408290
    Abstract: A thin film transistor and a non-volatile memory device are provided. The thin film transistor comprises a gate electrode, and a metal oxide channel layer traversing the upper or lower portions of the gate electrode. The metal oxide channel layer has semiconductor properties while having bixbyite crystals. An insulating layer is disposed between the gate electrode and the metal oxide channel layer. Source and drain electrodes are electrically connected to both ends of the metal oxide channel layer, respectively.
    Type: Application
    Filed: April 22, 2020
    Publication date: December 30, 2021
    Applicant: Industry- University Cooperation Foundation Hanyang University
    Inventors: Jae Kyeong JEONG, Hyun Ji YANG, Hyeon Joo SEUL
  • Publication number: 20210183886
    Abstract: Disclosed are a memory device based on an IGO channel layer and a method of fabricating the same. More particularly, the memory device according to an embodiment includes multilayers including at least one transition metal; and a channel layer formed adjacent to the multilayers and configured to include an indium gallium oxide (IGO) material.
    Type: Application
    Filed: October 30, 2020
    Publication date: June 17, 2021
    Applicant: IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
    Inventors: Chang Hwan Choi, Jae Kyeong Jeong, Soon Oh Jeong, Hoon Hee Han, Xuan Wang, Hyeon Joo Seul
  • Publication number: 20210104632
    Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.
    Type: Application
    Filed: December 17, 2020
    Publication date: April 8, 2021
    Inventors: Jae Kyeong JEONG, Yun Heub SONG, Chang Hwan CHOI, Hyeon Joo SEUL
  • Patent number: 10892366
    Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: January 12, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Kyeong Jeong, Yun Heub Song, Chang Hwan Choi, Hyeon Joo Seul
  • Publication number: 20190393353
    Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.
    Type: Application
    Filed: June 24, 2019
    Publication date: December 26, 2019
    Inventors: Jae Kyeong JEONG, Yun Heub SONG, Chang Hwan CHOI, Hyeon Joo SEUL