Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Abstract: An optimization system that minimizes a radio link failure may be provided. In the optimization system, a base station may include a measured data collecting unit to collect wireless environment data measured by a terminal included in a cell, a threshold managing unit to manage a threshold value associated with a radio link failure in a wireless section, an analyzing unit to manage a variable associated with a radio link failure, and to analyze a cause of the radio link failure, and a parameter changing unit to change a parameter value based on an analysis result of the analyzing unit.

Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Abstract: A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the active region including the gate forming zone, such that the portion of the active region including the gate forming zone constitutes a fin pattern; a silicon epitaxial layer formed on the active region including the fin pattern; and a gate formed to cover the fin pattern on which the silicon epitaxial layer is formed.

Abstract: A data management method of a data storage device having a data management unit different from a data management unit of a user device receives information regarding a storage area of a file to be deleted, from the user device, selects a storage area which matches with the data management unit of the data storage device, from among the storage area of the deleted file, and performs an erasing operation on the selected storage area which matches with the data management unit.

Abstract: A non-volatile memory system and a method of managing the power of the same are provided. The non-volatile memory system includes a non-volatile memory configured to store a first mapping table comprising a list of a logical address and a physical address corresponding to the logical address with respect to a code region and a list of a logical address and a physical address corresponding to the logical address with respect to a general purpose (GP) region, and a controller configured to load the first mapping table from the non-volatile memory to a first memory and load the second mapping table from the non-volatile memory to a second memory. Power-up of the second memory is delayed with respect to power-up of the non-volatile memory system and the first or second memory is powered down if a condition is satisfied, so that power consumption of the non-volatile memory system is reduced.

Abstract: The present invention relates to a dish washer in which a structure for mounting a drain pump is improved for minimizing residual water, vibration and noise. The dish washer includes a cabinet which forms an exterior of the dish washer, a tub in the cabinet to form a space for washing the dishes, a sump assembly at a lower portion of the cabinet, the sump assembly having a drain chamber for holding washing water to be drained, and a drain pump assembly coupled to a lower side of an outside of the sump assembly so as to be in communication with one side of the drain chamber for draining the washing water from the drain chamber by pumping, wherein the drain pump assembly is mounted tilted upward at a predetermined angle from an inside bottom surface of the cabinet.

Abstract: A method of screening a material for improving skin functions includes: (a) treating a skin cell with a candidate material; (b) detecting a change in a relative expression level of membrane-associated protein 17 (MAP17) gene; and (c) selecting a candidate material inducing the change in the expression level of the gene as a material for improving skin functions. That is to say, a material for improving skin functions is screened using MAP17 gene as a marker, on the basis of the change in the expression level of the MAP17 gene. A material for improving skin functions, which is useful in improving skin barrier function, promoting skin moisturization, preventing skin aging, or ameliorating skin troubles, may be effectively screened.

Abstract: A process for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern is described. The process includes forming a hard mask layer over a target layer that is desired to be etched. A sacrificial layer pattern is subsequently formed over the hard mask layer. Spacers are formed on the sidewalls of the sacrificial layer pattern. The protective layer is formed on the hard mask layer portions between the sacrificial patterns formed with the spacer. The sacrificial layer pattern and the protective layer are then later removed, respectively. The hard mask layer is etched using the spacer as an etching mask. After etching, the spacer is removed. Finally, the target layer is etched using the etched hard mask as an etching mask.

Abstract: A semiconductor device is manufactured by forming a low dielectric constant layer on a semiconductor substrate which is formed with metal lines; implementing primary ultraviolet treatment of the low dielectric constant layer; forming a capping layer on the low dielectric constant layer having undergone the primary ultraviolet treatment; and implementing secondary ultraviolet treatment of the low dielectric constant layer including the capping layer.

Abstract: A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the active region including the gate forming zone, such that the portion of the active region including the gate forming zone constitutes a fin pattern; a silicon epitaxial layer formed on the active region including the fin pattern; and a gate formed to cover the fin pattern on which the silicon epitaxial layer is formed.

Abstract: An isolation structure of a semiconductor device is formed by forming a hard mask layer on a semiconductor substrate having active and field regions to expose the field region. A trench is defined by etching the exposed field region of the semiconductor substrate using the hard mask as an etch mask. An SOG layer is formed in the trench partially filling the trench. An amorphous aluminum oxide layer is formed on the resultant substrate including the SOG layer. An HDP layer is formed on the amorphous aluminum oxide layer to completely fill the trench. The HDP layer and the amorphous aluminum oxide layer are subjected to CMP to expose the hard mask. The hard mask and portions of the amorphous aluminum oxide layer that are formed on the HDP layer are removed. The amorphous aluminum oxide layer is crystallized.

Abstract: Dishwashers and methods of control for operation of dishwashers are disclosed. The dishwasher can include one or more racks in a washing compartment for placing used dishes having foreign matter, such as food and drink, and unused dishes having relatively little or no foreign matter and varying washing loads. Operation of the dishwasher can include wash, water drain and supply, and rinse cycles. During the cycles, preheating of a steam generator, water draining and supplying, steam supplying, and water spraying can occur and partially or fully overlap. The dishwasher can reduce excessive washing of dishes having small washing loads and improve power and water consumption.

Abstract: Dishwashers and methods of control for operation of dishwashers are disclosed. The dishwasher may include an upper rack in an upper portion of a washing compartment configured to receive small dishes, such as a cup having a small washing load, and a lower rack in a lower portion of the washing compartment for placing large dishes, such as a dinner bowl having a large washing load. The operation of the dishwasher can include wash and rinse cycles having a plurality of sub-cycles. During the sub-cycles, the upper and lower racks can be selectively sprayed with water and steam can be supplied to the washing compartment based on configured conditions, such as a water temperature or operation time being reached. The operation of the dishwasher can reduce excessive washing of dishes having small washing loads and reduce power consumption of the dishwasher.

Abstract: A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the active region including the gate forming zone, such that the portion of the active region including the gate forming zone constitutes a fin pattern; a silicon epitaxial layer formed on the active region including the fin pattern; and a gate formed to cover the fin pattern on which the silicon epitaxial layer is formed.

Abstract: A method for manufacturing a semiconductor device is disclosed. The method includes the steps of defining a trench into a field region of a semiconductor substrate having an active region and the field region; partially filing the trench with a flowable insulation layer; completely filling the trench with an isolation structure by depositing a close-packed insulation layer on the flowable insulation layer in the trench; etching through a portion of the close-packed insulation layer and etching into a partial thickness of the flowable insulation layer of the insulation structure to expose a portion of the active region; cleaning the resultant substrate having the active region relatively projected; forming spacers on etched portions of the flowable insulation layer where bowing occurs during the cleaning step; and forming gates on the active region and the insulation structure to border the exposed portion of the active region.

Abstract: The semiconductor device having an air gap includes an insulation layer formed on a semiconductor substrate and having a metal line forming region. A metal line is formed to fill the metal line forming region of the insulation layer. An air gap is formed between the insulation layer and the metal line.

Abstract: An isolation structure of a semiconductor device is formed by forming a hard mask layer on a semiconductor substrate having active and field regions to expose the field region. A trench is defined by etching the exposed field region of the semiconductor substrate using the hard mask as an etch mask. An SOG layer is formed in the trench partially filling the trench. An amorphous aluminum oxide layer is formed on the resultant substrate including the SOG layer. An HDP layer is formed on the amorphous aluminum oxide layer to completely fill the trench. The HDP layer and the amorphous aluminum oxide layer are subjected to CMP to expose the hard mask. The hard mask and portions of the amorphous aluminum oxide layer that are formed on the HDP layer are removed. The amorphous aluminum oxide layer is crystallized.

Abstract: An isolation structure of a semiconductor device is formed by forming a hard mask layer on a semiconductor substrate having active and field regions to expose the field region. A trench is defined by etching the exposed field region of the semiconductor substrate using the hard mask as an etch mask. An SOG layer is formed in the trench partially filling the trench. An amorphous aluminum oxide layer is formed on the resultant substrate including the SOG layer. An HDP layer is formed on the amorphous aluminum oxide layer to completely fill the trench. The HDP layer and the amorphous aluminum oxide layer are subjected to CMP to expose the hard mask. The hard mask and portions of the amorphous aluminum oxide layer that are formed on the HDP layer are removed. The amorphous aluminum oxide layer is crystallized.

Abstract: A process for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern is described. The process includes forming a hard mask layer over a target layer that is desired to be etched. A sacrificial layer pattern is subsequently formed over the hard mask layer. Spacers are formed on the sidewalls of the sacrificial layer pattern. The protective layer is formed on the hard mask layer portions between the sacrificial patterns formed with the spacer. The sacrificial layer pattern and the protective layer are then later removed, respectively. The hard mask layer is etched using the spacer as an etching mask. After etching, the spacer is removed. Finally, the target layer is etched using the etched hard mask as an etching mask.