Patents by Inventor Hyeon Jun HWANG

Hyeon Jun HWANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240099136
    Abstract: Disclosed herein are a method for manufacturing a graphene thermoelectric device and a graphene thermoelectric device manufactured thereby. The method for manufacturing a graphene thermoelectric device includes: forming a graphene channel layer on a substrate; forming a thermoelectric structure by depositing a first electrode and a second electrode on both ends of the graphene channel layer; and doping the graphene channel layer by dipping the thermoelectric structure into a doping solution.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Applicant: POSTECH Research and Business Development Foundation
    Inventors: Byoung Hun LEE, Hyeon Jun HWANG
  • Publication number: 20170256667
    Abstract: Disclosed herein is a photodetector utilizing graphene. A single-layer graphene channel is formed on a semiconductor substrate doped with n-type impurity. The graphene channel has an end connected to a source electrode and is physically separated from a drain electrode. Light having passed through a gate insulation layer and a gate electrode generates electron-hole pairs at the interface between the graphene channel and the semiconductor substrate forming a Schottky junction, and a photocurrent is generated by a Schottky barrier. In addition, the Schottky barrier is changed according to an applied gate voltage, thereby changing the photocurrent.
    Type: Application
    Filed: February 23, 2017
    Publication date: September 7, 2017
    Inventors: Byoung Hoon LEE, Kyoung Eun CHANG, Tae Jin YOO, Hyeon Jun HWANG
  • Publication number: 20140176186
    Abstract: A graphene multiple-valued logic device and a fabrication method thereof are disclosed. The graphene multiple-valued logic device includes a substrate, a graphene channel layer disposed on the substrate, source and drain electrodes disposed at both ends of the graphene channel layer, respectively, an insulator film formed on the graphene channel layer; and at least two gate electrodes disposed on the insulator film with a predetermined gap defined therebetween. The device allows adjustment of conductivity and resistance of the graphene channel layer depending on a gate voltage, whereby electric current flowing in the device can be variously changed when applied to a multiple-valued logic system.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 26, 2014
    Applicant: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Byoung Hun LEE, Hyeon Jun HWANG, Yoon Ji KIM