Patents by Inventor Hyeon Ki

Hyeon Ki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110221988
    Abstract: A liquid crystal display includes first and second substrates, and a liquid crystal layer disposed therebetween. First and second gate lines are disposed on the first substrate. First and second data lines, and a power line are disposed on the first substrate. A first switching element is connected to the first gate line and the first data line, a second switching element is connected to the first gate line and the power line, a third switching element is connected to the second gate line and the second data line, a first pixel electrode is connected to the first switching element, a second pixel electrode is connected to the second switching element, a third pixel electrode is connected to the second switching element, and a fourth pixel electrode is connected to the third switching element, and a gate-on voltage can be simultaneously applied to the first and second gate lines.
    Type: Application
    Filed: October 7, 2010
    Publication date: September 15, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-Hyoung Cho, Dong-Gyu Kim, Mee-Hye Jung, Dong-Hyeon Ki, Seung-Soo Baek, Hye-Seok Na
  • Patent number: 8018542
    Abstract: A display substrate includes a base substrate, a conductive line on the base substrate, a switching element and a testing member. The switching element includes a first electrode formed on the semiconductor layer pattern and electrically connected to the conductive line, and a second electrode spaced apart from the first electrode and semiconductor layer pattern. The testing member includes a conductive line testing portion that is formed from the same layer as the conductive line and an electrode testing portion that is formed from the same layer as the first electrode. The conductive line testing portion and the electrode testing portion have substantially the same width as the conductive line and the first electrode, respectively. The testing member also includes a semiconductor layer testing portion. The display substrate lends itself to efficient manufacturing with reduced process time and cost.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: September 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Joon Park, Min-Wook Park, Dong-Hyeon Ki
  • Publication number: 20110096280
    Abstract: Disclosed are a liquid crystal display device and a method of manufacturing the liquid crystal display device. The liquid crystal display device includes a first insulating substrate, a gate line and a data line formed on the first insulating substrate and crossing each other, a first pixel electrode formed on the first insulating substrate and including a first part and a second part which are physically separated, a second pixel electrode formed on the first insulating substrate and forming an electric field with the first pixel electrode, a connection bridge including at least one conductive layer and electrically connecting the first part with the second part through a contact hole, and at least one insulating layer positioned between the first pixel electrode and the connection bridge, wherein the contact hole is formed in the at least one insulating layer.
    Type: Application
    Filed: September 17, 2010
    Publication date: April 28, 2011
    Inventors: DONG-HYEON KI, Mee-Hye Jung, Se-Hyoung Cho, Dong-Gyu Kim, Seung-Soo Baek, Hye-Seok Na
  • Publication number: 20110085100
    Abstract: A display substrate includes a first pixel electrode and a second pixel electrode. The first pixel electrode includes a plurality of first electrode bars. A data line provides a data voltage to the first pixel electrode. The second pixel electrode includes a plurality of second electrode bars alternately disposed with the first electrode bars. A first power line is formed adjacent to a gate line to provide a first voltage to the second pixel electrode. A second power line crosses the first power line and is electrically connected to the first power line. A first switching element is electrically connected to the data line, the gate line and the first pixel electrode. A second switching element is electrically connected to the first power line, the gate line and the second pixel electrode.
    Type: Application
    Filed: October 5, 2010
    Publication date: April 14, 2011
    Inventors: Dong-Gyu KIM, Seung-Soo Baek, Mee-Hye Jung, Dong-Hyeon Ki, Sei-Hyoung Jo, Hye-Seok Na
  • Patent number: 7851835
    Abstract: A display substrate includes a substrate, a first insulating layer, an undercut compensating member, a first electrode, a second insulating layer and a first conductive pattern. The first insulating layer is formed on the substrate. The undercut compensating member is formed on the first insulating layer. The undercut compensating member has an etching rate smaller than that of the first insulating layer. The first electrode is formed on a portion of the undercut compensating member. The second insulating layer is formed on the first insulating layer. The second insulating layer has a contact hole through which a portion of the first electrode and a remaining portion of the undercut compensating member. The first conductive pattern electrically connected to the first electrode through the contact hole.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: December 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-Tack Kang, Dong-Hyeon Ki, Sung-Man Kim, Sang-Hoon Lee
  • Patent number: 7745823
    Abstract: A thin film panel is provided, which includes a first signal line and a second signal line crossing the first signal line and formed on a different layer from the first signal line. The second signal line includes an expansion having an enlarged area and at least one cutout, and is disposed adjacent to a crossing region where the second signal line crosses the first signal line.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 29, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Hyeon Ki
  • Publication number: 20100134399
    Abstract: A method of driving a gate line includes: charging one of a scan start signal and a carry signal provided from a previous stage to a first node of a present stage; outputting a gate signal through a gate node of the present stage by pulling up a high level of a first clock signal at the first node to boost up a voltage potential of the first node; discharging the voltage potential of the first node and a voltage potential of the gate node to hold the first node and the gate node at a first power voltage as the first clock signal is shifted to a low level; and receiving a voltage potential signal of a second node of the previous stage, the second node holding a gate signal outputted from the previous stage, to reduce a ripple generated at the first node.
    Type: Application
    Filed: April 15, 2009
    Publication date: June 3, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Hyeon KI, Ho-Kyoon KWON, Ju-Hee LEE, Byoung-Sun NA
  • Publication number: 20100090995
    Abstract: A display apparatus and a multi-display apparatus having larger display areas. The display apparatus includes a first insulating substrate, as well as a plurality of gate lines and a plurality of data lines on the first insulating substrate, where the plurality of gate lines is arranged to intersect the plurality of data lines. A plurality of storage electrode lines is arranged substantially parallel to the plurality of gate lines. A gate drive chip is mounted off of the first insulating substrate and electrically connected to the plurality of gate lines and the plurality of storage electrode lines. The gate drive chip is configured to apply a gate voltage to the gate lines and a storage voltage to the storage electrode lines.
    Type: Application
    Filed: October 12, 2009
    Publication date: April 15, 2010
    Inventors: Chae-Woo CHUNG, Jae-Hyun Cho, Jeong-Uk Heo, Sun-Kyu Son, Dong-Hyeon Ki
  • Patent number: 7538399
    Abstract: The present invention relates to a thin film transistor (TFT) substrate and method of making such a TFT substrate. The structure of the TFT substrate helps prevent damage to signal lines in non-display areas.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: May 26, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-il Kim, Dong-hyeon Ki, Yun-hee Kwak, Hyeong-jun Park, Byeong-jae Ahn, Shin-tack Kang
  • Publication number: 20080186439
    Abstract: An LCD panel is provided for improving a contrast ratio by suppressing light leakage around gate lines of an assembly that is structured to support a liquid crystal alignment mode that enhanced side view visibility of the LCD image. The LCD panel includes a first base substrate, a plurality of gate lines and a plurality of data lines disposed on the first base substrate and crossing each other, a pixel electrode comprising a first oblique line and a second oblique line disposed on the first base substrate and inclined in a different direction from each other with respect to the gate lines, a second base substrate, a common electrode disposed on the second base substrate and alternately positioned with the pixel electrode, wherein a portion of the common electrode overlaps the gate line segment, and a liquid crystal layer disposed between the first and second base substrates.
    Type: Application
    Filed: January 24, 2008
    Publication date: August 7, 2008
    Inventors: Ji-Hyun KWON, Hyeok-Jin Lee, Byoung-Sun Na, LuJian Gang, Dong-Hyeon Ki, Hwa-Sung Woo
  • Publication number: 20080100560
    Abstract: In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.
    Type: Application
    Filed: October 30, 2007
    Publication date: May 1, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-Sun NA, Dong-Hyeon KI, Min-Cheol LEE, Soon-Il AHN
  • Publication number: 20080068548
    Abstract: A liquid crystal display device includes a first insulating substrate, a gate line and a data line which are formed on the first insulating substrate and intersect each other insulatedly to define a pixel area. A pixel electrode is electrically coupled to the data line and includes a first stem electrode which is parallel with the data line, a plurality of first branch electrodes which are connected with the first stem electrode and substantially parallel with each other, and a first edge electrode which is located at a connecting area between the first stem electrode and the first branch electrode and extends to an area between the first branch electrodes. A second insulating substrate is provided which includes a common electrode formed on the second insulating substrate, the common electrode including a plurality of second branch electrodes which are located between the first branch electrodes. The second branch electrodes are substantially parallel with the first branch electrodes.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 20, 2008
    Inventors: Ji-hyun Kwon, Won-hee Lee, Ho-kyoon Kwon, Byoung-sun Na, Dong-hyeon Ki, Soon-il Ahn
  • Publication number: 20080049160
    Abstract: A liquid crystal display according to an embodiment of the invention includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate to intersect the gate lines, and a plurality of pixel electrodes formed on the substrate. In the liquid crystal display, the pixel electrode includes a first main side substantially parallel with the gate line, a second main side substantially parallel with the data line, a first oblique side making a first oblique angle with respect to the first and second main sides, and a second oblique side making a second oblique angle with respect to the first and second main sides. The first oblique angle and the second oblique angle are different from each other.
    Type: Application
    Filed: July 25, 2007
    Publication date: February 28, 2008
    Inventors: Ji-Hyun Kwon, Byoung-Sun Na, Dong-Hyeon Ki, Soon-Il Ahn
  • Publication number: 20070045636
    Abstract: A display substrate includes a substrate, a first insulating layer, an undercut compensating member, a first electrode, a second insulating layer and a first conductive pattern. The first insulating layer is formed on the substrate. The undercut compensating member is formed on the first insulating layer. The undercut compensating member has an etching rate smaller than that of the first insulating layer. The first electrode is formed on a portion of the undercut compensating member. The second insulating layer is formed on the first insulating layer. The second insulating layer has a contact hole through which a portion of the first electrode and a remaining portion of the undercut compensating member. The first conductive pattern electrically connected to the first electrode through the contact hole.
    Type: Application
    Filed: July 27, 2006
    Publication date: March 1, 2007
    Inventors: Shin-Tack Kang, Dong-Hyeon Ki, Sung-Man Kim, Sang-Hoon Lee
  • Publication number: 20070034522
    Abstract: A display substrate includes a base substrate, a conductive line on the base substrate, a switching element and a testing member. The switching element includes a first electrode formed on the semiconductor layer pattern and electrically connected to the conductive line, and a second electrode spaced apart from the first electrode and semiconductor layer pattern. The testing member includes a conductive line testing portion that is formed from the same layer as the conductive line and an electrode testing portion that is formed from the same layer as the first electrode. The conductive line testing portion and the electrode testing portion have substantially the same width as the conductive line and the first electrode, respectively. The testing member also includes a semiconductor layer testing portion. The display substrate lends itself to efficient manufacturing with reduced process time and cost.
    Type: Application
    Filed: August 10, 2006
    Publication date: February 15, 2007
    Inventors: Jung-Joon Park, Min-Wook Park, Dong-Hyeon Ki
  • Publication number: 20070001947
    Abstract: A thin film panel is provided, which includes a first signal line and a second signal line crossing the first signal line and formed on a different layer from the first signal line. The second signal line includes an expansion having an enlarged area and at least one cutout, and is disposed adjacent to a crossing region where the second signal line crosses the first signal line.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 4, 2007
    Inventor: Dong-Hyeon Ki
  • Patent number: 7130003
    Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: October 31, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Hyeon-Hwan Kim, Dong-Hyeon Ki
  • Publication number: 20060177770
    Abstract: The present invention relates to a thin film transistor (TFT) substrate and method of making such a TFT substrate. The structure of the TFT substrate helps prevent damage to signal lines in non-display areas.
    Type: Application
    Filed: December 15, 2005
    Publication date: August 10, 2006
    Inventors: Jeong-il Kim, Dong-hyeon Ki, Yun-hee Kwak, Hyeong-jun Park, Byeong-jae Ahn, Shin-tack Kang
  • Publication number: 20060157705
    Abstract: A thin film transistor array panel is provided, comprising: a gate line on an insulating substrate; a storage electrode line on the insulating substrate; a gate insulating layer over the gate line and the storage electrode line; a semiconductor layer on the gate insulating layer; a data line and a drain electrode on the semiconductor layer and separated from each other; a lower passivation layer formed on the semiconductor layer and having a first contact hole exposing the drain electrode; a color filter on the lower passivation layer; an upper passivation layer on the color filter and having a second contact hole exposing the drain electrode; and a pixel electrode connected to the drain electrode through the first and second contact holes; wherein the storage electrode line has a light blocking member parallel to the data line.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 20, 2006
    Inventor: Dong-Hyeon Ki
  • Publication number: 20060028279
    Abstract: There is provided a feedback amplifier capable of easily controlling its dynamic range without a separate gain control signal generation circuit. The feedback amplifier includes an input terminal detecting an input voltage from input current, a feedback amplification unit amplifying the input voltage to generate an output signal, and an output terminal outputting a signal amplified by the feedback amplification unit. The feedback amplification unit includes a feedback circuit unit including a feedback resistor located between the input terminal and the output terminal, and a feedback transistor connected in parallel to the feedback resistor; and a bias circuit unit supplying a predetermined bias voltage to the feedback transistor of the feedback circuit unit and merged in the feedback amplification unit.
    Type: Application
    Filed: November 23, 2004
    Publication date: February 9, 2006
    Inventors: Sang Lee, Hyeon Ki, Jin Kang, Kyu Shim, Kyoung Cho