Abstract: The present invention provides a battery monitoring method, which is performed by a battery monitoring device, including: measuring a first voltage drop across both ends of a first shunt resistor of a bus bar electrically connected to a battery and a second voltage drop across both ends of a second shunt resistor, which is in parallel or serial connection with the first shunt resistor; calculating a first current and a second current flowing, respectively, through the first shunt resistor and the second shunt resistor using a first voltage drop value and a second voltage drop value; and determining a state of the battery using a difference between a first current value and a second current value. According to the present invention, it is possible to increase the reliability of monitoring information related to the battery's state by utilizing current values that have undergone linearity compensation and temperature compensation.

Abstract: Provided is a compound of Chemical Formula 1: wherein: A1 represents Chemical Formula 1-a: the dotted line fuses with an adjacent ring, X is O or S, Ar1 is a substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing at least one of N, O and S; D is deuterium; L is a single bond, or a substituted or unsubstituted C6-60 arylene or C2-60 heteroarylene containing at least one of N, O and S; A2 is Chemical Formula 1-b or 1-c: L1 and L2 are independently a single bond, or a substituted or unsubstituted C6-60 arylene or C2-60 heteroarylene containing at least one of N, O and S; Ar2 to Ar5 are independently a substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing at least one of N, O and S; and n is 0 to 5, and an organic light-emitting device including the same.

Abstract: A light emitting display device includes a substrate including a display area and a non-display area adjacent to the display area, a lower pad electrode disposed on the substrate in the non-display area, a lower planarization layer disposed on the lower pad electrode and including a via hole exposing an upper surface of the lower pad electrode, an upper pad electrode disposed on the lower pad electrode, the upper pad electrode being electrically connected to the lower pad electrode through the via hole, and a covering layer in contact with a side surface portion of the upper pad electrode, the side surface portion of the upper pad electrode being disposed on the lower planarization layer.

Abstract: Designs of thermo-hygrostat devices capable of uniformly maintain temperature and humidity inside a chamber are disclosed. One example of such a device can include, among others, a chamber in which a sample is accommodated and internal temperature and humidity can be controlled; a lower duct provided on a first side of the chamber and sending a fluid inside the chamber to an outside of the chamber; a temperature and humidity control portion provided on the lower duct and controlling temperature and humidity of a fluid received from the lower duct.

Abstract: A semiconductor package includes a redistribution substrate having a first side and an opposite second side, a semiconductor chip on the first side of the redistribution substrate, a silicon capacitor on the second side of the redistribution substrate, a plurality of solder balls on the second side of the redistribution substrate and adjacent the silicon capacitor, and a metal pattern in the redistribution substrate and positioned between the silicon capacitor and the solder balls. The metal pattern includes a first portion extending in a first direction, and a second portion connected to the first portion and extending in a second direction different from the first direction.

Abstract: A fan-out semiconductor package includes a core member having a through-hole. A semiconductor chip is in the through-hole and has an active surface with connection pads and an inactive surface opposing the active surface. An encapsulant encapsulates at least portions of the core member and the semiconductor chip and fills at least a portion of the through-hole. A connection member is on the core member and the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads. The core member includes a groove portion penetrating from a wall of the through-hole up to an outer side surface of the core member in a lower portion of the core member on which the connection member is disposed.

Abstract: A fan-out semiconductor package includes a core member having a through-hole. A semiconductor chip is in the through-hole and has an active surface with connection pads and an inactive surface opposing the active surface. An encapsulant encapsulates at least portions of the core member and the semiconductor chip and fills at least a portion of the through-hole. A connection member is on the core member and the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads. The core member includes a groove portion penetrating from a wall of the through-hole up to an outer side surface of the core member in a lower portion of the core member on which the connection member is disposed.

Abstract: A fan-out semiconductor package includes a core member having a through-hole. A semiconductor chip is in the through-hole and has an active surface with connection pads and an inactive surface opposing the active surface. An encapsulant encapsulates at least portions of the core member and the semiconductor chip and fills at least a portion of the through-hole. A connection member is on the core member and the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads. The core member includes a groove portion penetrating from a wall of the through-hole up to an outer side surface of the core member in a lower portion of the core member on which the connection member is disposed.

Abstract: A fan-out semiconductor package includes a core member having a through-hole. A semiconductor chip is in the through-hole and has an active surface with connection pads and an inactive surface opposing the active surface. An encapsulant encapsulates at least portions of the core member and the semiconductor chip and fills at least a portion of the through-hole. A connection member is on the core member and the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads. The core member includes a groove portion penetrating from a wall of the through-hole up to an outer side surface of the core member in a lower portion of the core member on which the connection member is disposed.

Abstract: A pipe damage detection apparatus and method are disclosed. The pipe damage detection apparatus includes an ultrasonic supply unit configured to supply an ultrasonic signal to a pipe; an ultrasonic reception unit configured to receive the ultrasonic signal of the pipe; and an analysis unit configured to analyze the ultrasonic signal received by the ultrasonic reception unit, and determine whether the pipe is damaged. The pipe damage detection apparatus and method can detect whether a pipe that is difficult for an inspector to access because it is coated with an insulating material or buried in the ground is damaged.

Abstract: A pipe damage detection apparatus and method are disclosed. The pipe damage detection apparatus includes an ultrasonic supply unit configured to supply an ultrasonic signal to a pipe; an ultrasonic reception unit configured to receive the ultrasonic signal of the pipe; and an analysis unit configured to analyze the ultrasonic signal received by the ultrasonic reception unit, and determine whether the pipe is damaged. The pipe damage detection apparatus and method can detect whether a pipe that is difficult for an inspector to access because it is coated with an insulating material or buried in the ground is damaged.

Abstract: A joint detection-decoding receiver using a multistage parallel interference canceller for selectively estimating a partial codeword corresponding to a state transition (branch) is disclosed. The JDD receiver of the DS-CDMA system includes a PIC that employs a state sequence to selectively carry out a symbol estimation of a partial codeword corresponding to the branch so as to reduce complexity and a calculation load as well as maintaining a high performance of the receiver according to the joint detection-decoding.

Abstract: A joint detection-decoding receiver using a multistage parallel interference canceller for selectively estimating a partial codeword corresponding to a state transition (branch) is disclosed. The JDD receiver of the DS-CDMA system includes a PIC that employs a state sequence to selectively carry out a symbol estimation of a partial codeword corresponding to the branch so as to reduce complexity and a calculation load as well as maintaining a high performance of the receiver according to the joint detection-decoding.