Patents by Inventor Hyeong-ju Kang

Hyeong-ju Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method of multiplication using a plurality of identical partial multiplication modules
    Patent number: 7769797
    Abstract: A multiplication apparatus including a multiplier and multiplicand extractor for dividing the multiplicand into partial multiplicands and dividing the multiplier into partial multipliers, and for generating partial input pairs by combining the partial multiplicands with the partial multipliers, and a multiplication executor including identical partial multiplication modules for receiving the partial input pairs and outputting partial carries and partial products. The apparatus further includes an output generator for combining the partial carries with the partial products according to the execution instruction to generate a final output. For simple multiplications, each of the partial multiplication modules can pass data to and from an adjacent partial multiplication module to calculate the partial carry and the partial product, and pass bits exceeding its own multiplication coverage.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: August 3, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-kyoung Cho, Jung-wook Kim, In-cheol Park, Eul-hwan Lee, Hyeong-ju Kang
  • Apparatus and method of multiplication using a plurality of identical partial multiplication modules
    Publication number: 20050182813
    Abstract: A multiplication apparatus including a multiplier and multiplicand extractor for dividing the multiplicand into partial multiplicands and dividing the multiplier into partial multipliers, and for generating partial input pairs by combining the partial multiplicands with the partial multipliers, and a multiplication executor including identical partial multiplication modules for receiving the partial input pairs and outputting partial carries and partial products. The apparatus further includes an output generator for combining the partial carries with the partial products according to the execution instruction to generate a final output. For simple multiplications, each of the partial multiplication modules can pass data to and from an adjacent partial multiplication module to calculate the partial carry and the partial product, and pass bits exceeding its own multiplication coverage.
    Type: Application
    Filed: January 19, 2005
    Publication date: August 18, 2005
    Inventors: Won-kyoung Cho, Jung-wook Kim, In-cheol Park, Eul-hwan Lee, Hyeong-ju Kang