Patents by Inventor Hyeong-Soo Kim
Hyeong-Soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250086063Abstract: In an embodiment of the disclosed technology, a data storage device includes at least one memory device including a plurality of memory regions configured to store data, a first controller configured to allocate the plurality of memory regions according to a memory allocation request of one or more host devices, and a second controller configured to: generate, in response to a snapshot request of a first host device among the one or more host devices, snapshot data corresponding to at least part of the data stored in at least part of the plurality of memory regions allocated to the first host device; and store the snapshot data into an auxiliary storage device coupled to the second controller.Type: ApplicationFiled: January 24, 2024Publication date: March 13, 2025Inventors: Hyeong Soo KIM, Dong Kyun KIM
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Publication number: 20240211169Abstract: A memory system for efficiently processing data in performing a job may include a plurality of memory devices configured to store data, a main data processor configured to access the plurality of memory devices, a sub data processor group including a plurality of sub data processors each configured to access the plurality of memory devices, respectively, a host interface configured to receive, from a host, a request for a job, and a job controller configured to perform the job by using one of the main data processor and the sub data processor group depending on whether accesses to the plurality of memory devices are related to each other for the job.Type: ApplicationFiled: June 22, 2023Publication date: June 27, 2024Inventors: Soo Hong AHN, Hyeong Soo KIM, Joon Seop SIM
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Publication number: 20240139151Abstract: The present invention relates to a composition including decursinol as an active ingredient for preventing or treating angina, arteriosclerosis, cerebral infarction, and hypertension. Poorly soluble decursinol was found to improve angina, arteriosclerosis, cerebral infarction, prostate hypertrophy, and diabetic hypertension by inhibiting the overgrowth of vascular endothelial cells, and is expected to be usable in the development of a composition for preventing or treating angina, arteriosclerosis, cerebral infarction, prostate hypertrophy, and diabetic hypertension.Type: ApplicationFiled: January 11, 2022Publication date: May 2, 2024Applicant: KYUNGSUNG UNIVERSITY INDUSTRY COOPERATION FOUNDATIONInventors: Jae Seon KANG, Hyung Hoi KIM, Jae Sung PYO, Seong Jae LEE, Ye Jin HWANG, Hyeong Soo KIM, Jae Ki CHOI
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Patent number: 11776614Abstract: A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.Type: GrantFiled: February 22, 2022Date of Patent: October 3, 2023Assignee: SK hynix Inc.Inventors: Hyeong Soo Kim, Soo Hong Ahn
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Publication number: 20230150843Abstract: A device for selectively removing a perfluorinated compound may include an adsorption electrooxidation tank including a reaction unit having a plurality of electrodes and granular activated carbon configured to oxidize and decompose a perfluorinated compound in raw water through adsorption and electrooxidation, a power supply device configured to supply power to the adsorption electrooxidation tank, and a head adjustment pipe unit configured to maintain a water level within the reaction unit at a height greater than or equal to a reaction height of the electrode.Type: ApplicationFiled: November 4, 2022Publication date: May 18, 2023Inventors: Hae Sol SHIN, Hyeong Soo KIM, No Hyeok PARK, Yong Je LEE, Nam Jong YOO, Young Hee KIM
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Patent number: 11514972Abstract: A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.Type: GrantFiled: April 1, 2019Date of Patent: November 29, 2022Assignee: SK hynix Inc.Inventors: Hyeong Soo Kim, Soo Hong Ahn
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Publication number: 20220180915Abstract: A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.Type: ApplicationFiled: February 22, 2022Publication date: June 9, 2022Inventors: Hyeong Soo KIM, Soo Hong AHN
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Publication number: 20190341097Abstract: A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.Type: ApplicationFiled: April 1, 2019Publication date: November 7, 2019Inventors: Hyeong Soo KIM, Soo Hong AHN
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Patent number: 8057965Abstract: The invention relates to a mask and a method of fabricating the same. When a mask pattern is formed using E-Beam, the size of the divisional region obtained by a fracturing process can not be formed equally. Therefore, the uniformity of the mask pattern is degraded. In order to form the divisional region to be of equal sizes, the method includes performing a fracturing process by adding a subsidiary pattern to divide a region except for mask pattern, thereby obtaining a mask pattern having excellent uniformity and reducing defects of semiconductor devices.Type: GrantFiled: December 23, 2008Date of Patent: November 15, 2011Assignee: Hynix Semiconductor Inc.Inventor: Hyeong Soo Kim
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Publication number: 20100099046Abstract: A method for manufacturing a semiconductor device comprises forming a protective film over a photoresist pattern to improve the residual ratio of the photoresist pattern. The method comprises forming a photoresist pattern over an underlying layer and forming a protective pattern on an upper portion and sidewalls of the photoresist pattern.Type: ApplicationFiled: June 22, 2009Publication date: April 22, 2010Applicant: Hynix Semiconductor Inc.Inventors: Hyeong Soo Kim, Byoung Hoon Lee, Sa Ro Han Park
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Publication number: 20090170013Abstract: The invention relates to a mask and a method of fabricating the same. When a mask pattern is formed using E-Beam, the size of the divisional region obtained by a fracturing process can not be formed equally. Therefore, the uniformity of the mask pattern is degraded. In order to form the divisional region to be of equal sizes, the method includes performing a fracturing process by adding a subsidiary pattern to divide a region except for mask pattern, thereby obtaining a mask pattern having excellent uniformity and reducing defects of semiconductor devices.Type: ApplicationFiled: December 23, 2008Publication date: July 2, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Hyeong Soo Kim
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Publication number: 20080176047Abstract: Disclosed herein are a liquid composition for immersion lithography and a lithography method using the composition. The liquid composition includes at least one nonionic surfactant selected from the group comprising of a polyvinyl alcohol, a pentaerythritol-based compound, a polymer containing an alkylene oxide, and a compound represented by Formula I: wherein R is a linear or branched, substituted C1-C40 alkyl, and n is an integer ranging from 10 to 10,000. The surface tension of the liquid composition is reduced by the nonionic surfactant, thereby solving the problem that the liquid composition is not completely filled or is partially concentrated on a wafer having a fine topology and removing micro bubbles between the photoresist film and the liquid composition.Type: ApplicationFiled: June 22, 2007Publication date: July 24, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Keun Kyu Kong, Hyoung Ryeun Kim, Hyeong Soo Kim, Jae Chang Jung, Sung Koo Lee
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Patent number: 7339211Abstract: Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening an effective capacitor area. The inventive semiconductor device includes: a plurality of capacitor plugs disposed in an orderly separation distance; and a plurality of lower electrodes used for a capacitor and disposed in an orderly separation distance to be respectively connected with the capacitor plugs.Type: GrantFiled: July 23, 2003Date of Patent: March 4, 2008Assignee: Hynix Semiconductor Inc.Inventors: Dong-Sauk Kim, Ho-Seok Lee, Byung-Jun Park, Il-Young Kwon, Jong-Min Lee, Hyeong-Soo Kim, Jin-Woong Kim, Hyung-Bok Choi, Dong-Woo Shin
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Patent number: 7329477Abstract: The present invention provides a process for using an amine contamination-protecting top-coating composition. Preferably, the amine contamination-protecting top-coating composition of the present invention comprises an amine contamination-protecting compound. Useful amine contamination-protecting compounds include amine derivatives; amino acid derivatives; amide derivatives; urethane derivatives; urea derivatives; salts thereof; and mixtures thereof. The amine contamination-protecting top-coating composition of the present invention reduces or eliminates problems such as T-topping due to a post exposure delay effect and/or difficulties in forming a fine pattern below 100 nm due to acid diffusion associated with conventional lithography processes involving a photoresist polymer containing an alicyclic main chain using a light source, such as KrF (248 nm), ArF (193 nm), F2 (157 nm), E-beam, ion beam and extremely ultraviolet (EUV).Type: GrantFiled: November 19, 2004Date of Patent: February 12, 2008Assignee: Hynix Semiconductor Inc.Inventors: Jae Chang Jung, Keun Kyu Kong, Hyeong Soo Kim, Jin Soo Kim, Cha Won Koh, Sung Eun Hong, Geun Su Lee, Min Ho Jung, Ki Ho Baik
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Publication number: 20070085128Abstract: Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening an effective capacitor area. The inventive semiconductor device includes: a plurality of capacitor plugs disposed in an orderly separation distance; and a plurality of lower electrodes used for a capacitor and disposed in an orderly separation distance to be respectively connected with the capacitor plugs.Type: ApplicationFiled: December 8, 2006Publication date: April 19, 2007Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Dong-Sauk KIM, Ho-Seok Lee, Byung-Jun Park, Il-Young Kwon, Jong-Min Lee, Hyeong-Soo Kim, Jin-Woong Kim, Hyung-Bok Choi, Dong-Woo Shin
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Patent number: 6984482Abstract: The present invention provides an over-coating composition comprising a basic compound for coating a photoresist composition to provide a vertical photoresist pattern.Type: GrantFiled: June 17, 2002Date of Patent: January 10, 2006Assignee: Hynix Semiconductor Inc.Inventors: Jae Chang Jung, Keun Kyu Kong, Hyeong Soo Kim, Jin Soo Kim, Cha Won Koh, Sung Eun Hong, Geun Su Lee, Min Ho Jung, Ki Ho Baik
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Patent number: 6864590Abstract: The present invention relates to an alignment mark for use in a wafer alignment and a method for fabricating the same. The alignment mark for use in the wafer alignment includes: a first mark formed on a semiconductor layer; a second mark formed adjacent to the first mark on the semiconductor layer; and a concave part formed between the first mark and the second mark by etching a partial portion of the semiconductor layer, wherein the alignment mark is used to align a wafer by detecting a zeroth order diffract light reflected from a sloped surface formed because of a difference in height between the concave part and the first or second mark.Type: GrantFiled: December 24, 2003Date of Patent: March 8, 2005Assignee: Hynix Semiconductor Inc.Inventors: Sang-Man Bae, Hyeong-Soo Kim
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Publication number: 20050018525Abstract: Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening an effective capacitor area. The inventive semiconductor device includes: a plurality of capacitor plugs disposed in an orderly separation distance; and a plurality of lower electrodes used for a capacitor and disposed in an orderly separation distance to be respectively connected with the capacitor plugs.Type: ApplicationFiled: July 23, 2003Publication date: January 27, 2005Inventors: Dong-Sauk Kim, Ho-Seok Lee, Byung-Jun Park, Il-Young Kwon, Jong-Min Lee, Hyeong-Soo Kim, Jin-Woong Kim, Hyung-Bok Choi, Dong-Woo Shin
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Publication number: 20040261282Abstract: The present invention relates to an alignment mark for use in a wafer alignment and a method for fabricating the same. The alignment mark for use in the wafer alignment includes: a first mark formed on a semiconductor layer; a second mark formed adjacent to the first mark on the semiconductor layer; and a concave part formed between the first mark and the second mark by etching a partial portion of the semiconductor layer, wherein the alignment mark is used to align a wafer by detecting a zeroth order diffract light reflected from a sloped surface formed because of a difference in height between the concave part and the first or second mark.Type: ApplicationFiled: December 24, 2003Publication date: December 30, 2004Inventors: Sang-Man Bae, Hyeong-Soo Kim
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Patent number: 6797451Abstract: The present invention provides a resin of the formula: where R1, R2, R3, x and y are those defined herein. The present invention also provides methods for using the above described resin to inhibit reflection of light from the lower layer of a wafer substrate during a photoresist pattern formation process.Type: GrantFiled: July 3, 2002Date of Patent: September 28, 2004Assignee: Hynix Semiconductor Inc.Inventors: Sung Eun Hong, Min Ho Jung, Hyeong Soo Kim, Jae Chang Jung, Ki Ho Baik