Patents by Inventor Hyeong Tae Park

Hyeong Tae Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140055273
    Abstract: A method of alarming an abnormal state of a line of an automated manufacturing system using a programmable logic controller (PLC) signal pattern is provided.
    Type: Application
    Filed: July 22, 2011
    Publication date: February 27, 2014
    Applicant: UDMTEK CO., LTD.
    Inventors: Hyeong Tae Park, Chol Hwan Kim, Gi Nam Wang, Sang Chul Park, Jin Young Cho, Jung Ho Nam
  • Patent number: 8612200
    Abstract: Disclosed are a PLC (Programmable Logic Controller) symbol structure for a PLC code for automatically generating an input/output model, and a simulation apparatus and a simulation method for testing the PLC code using the same. In one embodiment, a computer-readable recording medium records a PLC code including a plurality of PLC symbols, wherein each of the PLC symbols includes a plurality of levels identified by an identifier, and a computer automatically generates an input/output model using the structure of each of the PLC symbols, thereby performing a simulation for testing the PLC code. The PLC symbol structure according to one embodiment systematically contains information required for automatically generating the input/output model, making it possible to automatically generate the input/output model for testing the PLC code in an easier manner without knowledge of simulation and modeling, and reducing the time consumed and the labor required for generating the input/output model.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: December 17, 2013
    Assignee: UDMTEK Co., Ltd.
    Inventors: Gi Nam Wang, Sang Chul Park, Hyeong Tae Park
  • Publication number: 20120022849
    Abstract: Disclosed are a PLC (Programmable Logic Controller) symbol structure for a PLC code for automatically generating an input/output model, and a simulation apparatus and a simulation method for testing the PLC code using the same. In one embodiment, a computer-readable recording medium records a PLC code including a plurality of PLC symbols, wherein each of the PLC symbols includes a plurality of levels identified by an identifier, and a computer automatically generates an input/output model using the structure of each of the PLC symbols, thereby performing a simulation for testing the PLC code. The PLC symbol structure according to one embodiment systematically contains information required for automatically generating the input/output model, making it possible to automatically generate the input/output model for testing the PLC code in an easier manner without knowledge of simulation and modeling, and reducing the time consumed and the labor required for generating the input/output model.
    Type: Application
    Filed: March 24, 2010
    Publication date: January 26, 2012
    Applicant: UDMTEK CO., LTD.
    Inventors: Gi Nam Wang, Sang Chul Park, Hyeong Tae Park