Patents by Inventor Hyeongwon Choi

Hyeongwon Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121958
    Abstract: A vertical semiconductor device includes; a pattern structure including a plurality of insulation patterns and a plurality of gate electrodes that are alternately and repeatedly stacked on a substrate, wherein the pattern structure includes a first gate electrode serving as a gate electrode of an erase transistor, wherein the first gate electrode is one of the plurality of gate electrodes; and a channel structure in a channel hole passing through the pattern structure, wherein the channel structure includes a data storage structure, a first channel, an undoped semiconductor liner, a doped semiconductor pattern, a filling insulation pattern and a capping pattern, wherein the data storage structure, the first channel, the undoped semiconductor liner, and the doped semiconductor pattern are sequentially disposed on a sidewall of the first gate electrode.
    Type: Application
    Filed: September 7, 2023
    Publication date: April 11, 2024
    Inventors: Samki KIM, Nambin KIM, Taehun KIM, Suhwan LIM, Hyeongwon CHOI
  • Publication number: 20230035421
    Abstract: A semiconductor device includes a lower structure including a semiconductor substrate and circuit devices on the semiconductor substrate; a stack structure including interlayer insulating layers and gate electrodes alternating in a vertical direction; and a channel structure penetrating the stack structure. The channel structure includes a core insulating layer, a channel layer, a gate dielectric layer, and a channel pad. A portion of the channel pad overlaps an uppermost gate electrode among the gate electrodes in a horizontal direction. The channel pad includes a first pad layer and a second pad layer on the first pad layer. The second pad layer includes doped polysilicon that is doped with impurities and having N-type conductivity. The first pad layer includes at least one of an undoped polysilicon region and a doped polysilicon region having N-type conductivity and having an impurity concentration lower than an impurity concentration of the second pad layer.
    Type: Application
    Filed: April 14, 2022
    Publication date: February 2, 2023
    Inventors: Suhwan LIM, Nambin KIM, Samki KIM, Taehun KIM, Hanvit YANG, Changhee LEE, Jaehun JUNG, Hyeongwon CHOI
  • Publication number: 20120252040
    Abstract: The present invention relates to a kit and method for diagnosing prostate cancer, which use an antibody to prostate-specific antigen (PSA) to detect PSA in human urine. More specifically, the invention relates to a kit for diagnosing prostate cancer, which comprises an antibody to PSA and uses human urine as a sample, and to a method for diagnosing prostate cancer, which comprises brining a human urine sample into contact with an antibody to PSA in order to detect PSA in the sample.
    Type: Application
    Filed: November 29, 2010
    Publication date: October 4, 2012
    Applicant: Cell & Bio Co., Ltd.
    Inventors: Kang Jun Yoon, Young Sook Son, Hyun Sook Hong, Hyeongwon Choi