Abstract: A semiconductor package includes a first semiconductor chip including a circuit layer on a first substrate, first through silicon vias passing through the first substrate, first lower bump pads on the circuit layer, and a first upper bump pad and a second upper bump pad on a second surface of the first substrate, each of the first upper bump pad and the second upper bump pad connected to a corresponding one of the first through silicon vias. The package includes a second semiconductor chip including a circuit layer on a first surface of a second substrate, and second lower bump pads on the circuit layer on the second substrate. The package includes a first solder bump to bond the first upper bump pad and the second lower bump pad, and a plurality of second solder bumps to bond the second upper bump pad and the second lower bump pads.

Abstract: In some embodiments, the effect of uniformly dispersing carbon nanotubes in the material is achieved by including Ag in the carbon nanotubes to suppress the aggregation of carbon nanotubes when the electrical contacts are prepared.

Abstract: In some embodiments, the effect of uniformly dispersing carbon nanotubes in the material is achieved by including Ag in the carbon nanotubes to suppress the aggregation of carbon nanotubes when the electrical contacts are prepared.