Abstract: A display apparatus includes a first sub-pixel electrode, a conductive bank layer which is disposed on the first sub-pixel electrode and in which a first opening overlapping the first sub-pixel electrode is defined. The conductive bank layer includes first and second conductive layers having different etch selectivities from each other, an insulating layer which is disposed between a peripheral portion of the first sub-pixel electrode and the conductive bank layer and in which an opening overlapping the first opening is defined, an insulating protective layer which is disposed between the insulating layer and the conductive bank layer and in which an opening overlapping the first opening is defined. The insulating protective layer includes an insulating material having an etch selectivity different from an etch selectivity of the insulating layer, a first intermediate layer overlapping the first sub-pixel electrode through the first opening of the conductive bank layer.

Abstract: A semiconductor device includes a switching element, and a data storage structure electrically connected to the switching element. The data storage structure includes first electrodes, a second electrode, and a dielectric layer between the first electrodes and the second electrode. The second electrode includes a compound semiconductor layer doped with an impurity element, the compound semiconductor layer includes two or more elements and includes a semiconductor material doped with the impurity element, the two or more elements include a first element and a second element, the first element is silicon (Si), and a concentration of the impurity element in the compound semiconductor layer is in a range of about 0.1 at % to about 5 at %, and a concentration of the first element in the compound semiconductor layer is in a range of about 10 at % to about 15 at %.

Abstract: A display panel includes a substrate including a display area and a non-display area disposed outside the display area, first to third light-emitting diodes disposed on a substrate in the display area, a metal bank layer disposed in the display area and having pixel openings, a first inorganic encapsulation layer disposed on the first light-emitting diode, a first dummy layer disposed between the first inorganic encapsulation layer and the metal bank layer, a first clad layer overlapping an end of the first dummy layer, and a dam disposed on the non-display area and including a first inorganic layer and a second inorganic layer on the first inorganic layer, wherein the first inorganic layer and the first inorganic encapsulation layer include a same material, and the second inorganic layer and the first clad layer include a same material.

Abstract: A display apparatus includes: a first display element configured to emit light of a first color and comprising a first pixel electrode; a second display element configured to emit light of a second color that is different from the first color and comprising a second pixel electrode; a third display element configured to emit light of a third color that is different from the first color and the second color and comprising a third pixel electrode; a fourth display element configured to emit light of the first color and comprising a fourth pixel electrode; and a first connection wiring under the first to fourth pixel electrodes, configured to connect the first pixel electrode to the fourth pixel electrode, at least partially overlapping the first to fourth pixel electrodes, and comprising an oxide semiconductor material.

Abstract: An electronic device includes a display panel that includes a first region and a second region adjacent to the first region. The display panel includes a first light emitting unit that is disposed in the first region and that includes (1-1)th light emitting elements, (1-2)th light emitting elements, and (1-3)th light emitting elements and a second light emitting unit that is disposed in the first region and that includes (2-1)th light emitting elements, (2-2)th light emitting elements, and (2-3)th light emitting elements. The (1-1)th light emitting elements and the (2-1)th light emitting elements have the same arrangement pattern, the (1-3)th light emitting elements and the (2-3)th light emitting elements have the same arrangement pattern, and the (1-2)th light emitting elements and the (2-2)th light emitting elements have different arrangement patterns.

Abstract: A display apparatus includes a display area and a non-display area, an inorganic insulating layer, display elements in the display area, an encapsulation layer including a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer between the first inorganic encapsulation layer and the second inorganic encapsulation layer, a dam in the non-display area, and a power supply line on the inorganic insulating layer in the non-display area, and a portion of the power supply line intersects the dam, an edge of the portion of the power supply line is covered by at least one transparent conductive material layer, a portion of the first inorganic encapsulation layer is on the portion of the power supply line covered by the at least one transparent conductive material layer.

Abstract: A display panel includes: a base layer including a first region, a circuit layer including a first intermediate insulation layer disposed on the base layer and a compensation layer disposed on the base layer, a light emission element layer including a first light emission element having a first electrode and disposed in the first region, and disposed on the circuit layer, and a first spacer disposed on the circuit layer, and overlapping the compensation layer in a plan view. The first region includes an element region overlapping the first electrode and a transmission region not overlapping the first electrode, and the first spacer and the compensation layer are each disposed in the transmission region.

Abstract: A display panel includes a base layer including a component area, a circuit layer disposed on the base layer, and a light emitting device layer including a first light emitting device disposed in the component area. The circuit layer includes first conductive patterns each extending in a first direction, at least one first intermediate insulating layer disposed on the first conductive patterns, and second conductive patterns disposed on the at least one first intermediate insulating layer and each extending in a second direction intersecting the first direction. Each of the first conductive patterns and the second conductive patterns overlap the first light emitting device in a plan view.

Abstract: A display panel includes a substrate including adjacently-positioned first display area and second display area, a first inorganic insulation layer on the substrate and defining a transmission part in the second display area, a second inorganic insulation layer disposed on the first inorganic insulation layer and covering an inner surface and a bottom surface of the transmission part, a transparent wire on the second inorganic insulation layer in the second display area a via insulation layer on the second inorganic insulation layer and the transparent wire and including an organic material, a first light emitting element on the via insulation layer in the first display area, a second light emitting element on the via insulation layer in the second display area and electrically connected to the transparent wire, and an encapsulation layer covering the first and the second light emitting elements.

Abstract: A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.

Abstract: A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.

Abstract: A display device includes a substrate, a first lower pattern disposed on the substrate, a second lower pattern disposed in a same layer as the first lower pattern and integrally formed with the first lower pattern, an etch stopper disposed on the second lower pattern, a power voltage line disposed on the first lower pattern, and a transfer pattern disposed on the etch stopper, connected to the power voltage line, and contacting the second lower pattern through a contact hole defined through the etch stopper.

Abstract: A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.