Abstract: This applications relates to methods and apparatus for amplifying signals from capacitive transducers, in particular MEMS transducers such as MEMS capacitive microphones. An amplifier circuit has a signal node for receiving the input signal, a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer, and a voltage buffer configured to generate a buffered bias voltage at a buffer node. An amplifier arrangement is configured to receive the input signal from the signal node and the buffered bias voltage.

Abstract: This applications relates to methods and apparatus for amplifying signals from capacitive transducers, in particular MEMS transducers such as MEMS capacitive microphones. An amplifier circuit has a signal node for receiving the input signal, a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer, and a voltage buffer configured to generate a buffered bias voltage at a buffer node. An amplifier arrangement is configured to receive the input signal from the signal node and the buffered bias voltage.

Abstract: An amplifier circuit has a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer and a signal node for receiving the input signal. An amplifier arrangement comprising a feedback resistor network provides an amplified output signal. A voltage buffer provides a buffered bias voltage at a buffer node which is connected to a terminal of the feedback resistor network, to at least partly define the quiescent level of the output signal. The buffer node is electrically coupled to the transducer biasing node via a capacitance which may form part of a bias filter.

Abstract: This applications relates to methods and apparatus for amplifying signals from capacitive transducers, in particular MEMS transducers such as MEMS capacitive microphones. An amplifier circuit has a transducer biasing node (102) for outputting a transducer bias voltage for biasing the capacitive transducer (101) and a signal node (103) for receiving the input signal (Vin). An amplifier arrangement (108) comprising a feedback resistor network (304, 305) provides an amplified output signal (Vout). A voltage buffer (306) provides a buffered bias voltage at a buffer node (307) which is connected to a terminal of the feedback resistor network, to at least partly define the quiescent level of the output signal. The buffer node (307) is electrically coupled to the transducer biasing node (102) via a capacitance (106) which may form part of a bias filter.

Abstract: A switch including a first transistor including a first main terminal connected to a first switch node, a second main terminal connected to a second switch node and a control terminal, the second switch node being connected to a first clean voltage supply, and first control circuitry connected to the control terminal of the first transistor, including a first node connected to the first clean voltage supply, a second node connected to a second voltage level, and a control input node for receiving a first input control signal variable between a supply voltage level and a third voltage level, the first control means arranged to selectively connect the control terminal of the first transistor to one of the first node and the second node based on the first input control signal.

Abstract: Systems and methods to achieve a charge pump for generating from single supply voltage energy efficient supply voltages that are symmetrical around ground voltage have been disclosed. The charge pump requires two flying capacitors only. The charge pump generates positive and negative supply voltages following a 1/N ratio of Vdd voltage, i.e. +?Vdd/N, and can be generalized to generate +/?Vdd/2N voltages. This is especially useful for supplying class-G amplifiers.

Abstract: Systems and methods to achieve a charge pump for generating from single supply voltage energy efficient supply voltages having a value of ±? Vdd, ±? Vdd, ±¼ Vdd, ±? Vdd, ±½ Vdd or ±1 Vdd that are symmetrical around ground voltage have been disclosed. The charge pump requires two flying capacitors only. The charge pump generates positive and negative supply voltages following a 1/N ratio of Vdd voltage, i.e. +?Vdd/N, and can be generalized to generate +/?Vdd/2N voltages. This is especially useful for supplying class-G amplifiers with a voltage or power, which is just enough e.g. for an audio signal to be correctly generated at the output of the amplifier.

Abstract: Systems and methods to achieve a charge pump for generating from single supply voltage energy efficient supply voltages that are symmetrical around ground voltage have been disclosed. The charge pump requires two flying capacitors only. The charge pump generates positive and negative supply voltages following a 1/N ratio of Vdd voltage, i.e. +?Vdd/N, and can be generalized to generate +/?Vdd/2N voltages. This is especially useful for supplying class-G amplifiers.

Abstract: Systems and methods to achieve a charge pump for generating from single supply voltage energy efficient supply voltages having a value of ±1/6 Vdd, ±1/5 Vdd, ±1/4 Vdd, ±1/3 Vdd, ±1/2 Vdd or ±1 Vdd that are symmetrical around ground voltage have been disclosed. The charge pump requires two flying capacitors only. The charge pump generates positive and negative supply voltages following a 1/N ratio of Vdd voltage, i.e. +?Vdd/N, and can be generalized to generate +/?Vdd/2N voltages. This is especially useful for supplying class-G amplifiers with a voltage or power, which is just enough e.g. for an audio signal to be correctly generated at the output of the amplifier.

Abstract: An amplifier with an output protection having an input stage defining a feedback node, an output stage connected to the feedback node and defining an output node supplying an output voltage, and a feedback stage connected between the output and the feedback nodes. A mirror stage is connected to the feedback node and has the same structure as the output stage, the mirror stage defining a reference node connected to the feedback stage for generating a reference voltage to be compared to the output voltage by the feedback stage. The feedback stage generates a current limitation signal fed to the feedback node when a difference between the output and the reference voltages is higher than a threshold.

Abstract: A circuit including a first sensitive node, a first component connected between the first sensitive node and a first terminal of a first switch, said first switch controlled by a first control signal variable between a supply voltage level and a second voltage level, and a second switch including a first terminal connected to the first terminal of said first switch, and a second terminal connected to a clean voltage supply, said second switch controlled to connect the first node of said first switch to said clean voltage supply when said first switch is in a non-conducting state.

Abstract: An amplifier with an output protection having an input stage defining a feedback node, an output stage connected to the feedback node and defining an output node supplying an output voltage, and a feedback stage connected between the output and the feedback nodes. A mirror stage is connected to the feedback node and has the same structure as the output stage, the mirror stage defining a reference node connected to the feedback stage for generating a reference voltage to be compared to the output voltage by the feedback stage. The feedback stage generates a current limitation signal fed to the feedback node when a difference between the output and the reference voltages is higher than a threshold.

Abstract: A switch including a first transistor including a first main terminal connected to a first switch node, a second main terminal connected to a second switch node and a control terminal, the second switch node being connected to a first clean voltage supply, and first control circuitry connected to the control terminal of the first transistor, including a first node connected to the first clean voltage supply, a second node connected to a second voltage level, and a control input node for receiving a first input control signal variable between a supply voltage level and a third voltage level, the first control means arranged to selectively connect the control terminal of the first transistor to one of the first node and the second node based on the first input control signal.

Abstract: A circuit including a first sensitive node, a first component connected between the first sensitive node and a first terminal of a first switch, said first switch controlled by a first control signal variable between a supply voltage level and a second voltage level, and a second switch including a first terminal connected to the first terminal of said first switch, and a second terminal connected to a clean voltage supply, said second switch controlled to connect the first node of said first switch to said clean voltage supply when said first switch is in a non-conducting state.