Abstract: A service identifying and processing method using a wireless terminal message according to an exemplary embodiment of the present invention includes (a) receiving a wireless terminal message by a first entity which is a mobile device; and (b) expressing, by a first agent which is an information processing application program installed on the first entity, entity information of second entity based on the wireless terminal message and service confirmation information related to service provided by the second entity, through an application screen by the first agent.

Abstract: An anode active material for a secondary battery includes a carbon-based active material, and silicon-based active material particles doped with magnesium. At least some of the silicon-based active material particles include pores, and a volume ratio of pores having a diameter of 50 nm or less among the pores is 2% or less based on a total volume of the silicon-based active material particles.

Abstract: The technology and implementations disclosed in this patent document generally relate to a lithium secondary battery including: a first unit cell including a first anode including a 1-1 anode mixture layer and a 1-2 anode mixture layer on the 1-1 anode mixture layer, and a second unit cell including a second anode including a 2-1 anode mixture layer and a 2-2 anode mixture layer on the 2-1 anode mixture layer, wherein a weight ratio of the silicon-based active material in the 1-2 anode mixture layer is greater than a weight ratio of the silicon-based active material in the 1-1 anode mixture layer, and a weight ratio of the silicon-based active material in the 2-2 anode mixture layer is less than or equal to a weight ratio of the silicon-based active material in the 2-1 anode mixture layer.

Abstract: An anode for a lithium secondary battery includes an anode current collector, and an anode active material layer formed on at least one surface of the anode current collector. The anode active material layer includes a carbon-based active material, a first silicon-based active material doped with magnesium and a second silicon-based active material not doped with magnesium. A content of the first silicon-based active material is in a range from 2 wt % to 20 wt % based on a total weight of the anode active material layer.

Abstract: In some implementations, the anode includes a current collector, a first anode mixture layer formed on at least one surface of the current collector, and a second anode mixture layer formed on the first anode mixture layer. The first anode mixture layer and the second anode mixture layer include a carbon-based active material, respectively. The first anode mixture layer includes a first binder, a first silicon-based active material, and a first conductive material. The second anode mixture layer includes a second binder, a second silicon-based active material, and a second conductive material. Contents of the first conductive material and the second conductive material are different from each other with respect to the total combined weight of the first anode mixture layer and the second anode mixture layer. Types of the first silicon-based active material and the second silicon-based active material are different from each other.

Abstract: A printed circuit board includes first and second insulating layers forming a cavity, a first heat releasing layer formed on an exterior surface of the cavity, and a circuit layer formed above or below the first the insulating layer and at least between a surface of the cavity and the first insulating layer. The heat releasing layer is electrically connected to at least a portion of the circuit layer.

Abstract: Provided are semiconductor devices including device isolation layers. The semiconductor device includes a substrate having a cell region and a core/peripheral region, a first active region in the cell region of the substrate, a first device isolation layer that defines the first active region, a second active region in the core/peripheral region of the substrate; and a second device isolation layer that defines the second active region. A height from a lower surface of the substrate to an upper end of the first device isolation layer in a first direction that is perpendicular to the lower surface of the substrate is less than or equal to a height from the lower surface of the substrate to an upper end of the first active region in the first direction.

Abstract: A printed circuit board includes first and second insulating layers forming a cavity, a first heat releasing layer formed on an exterior surface of the cavity, and a circuit layer formed above or below the first the insulating layer and at least between a surface of the cavity and the first insulating layer. The heat releasing layer is electrically connected to at least a portion of the circuit layer.

Abstract: The present invention relates to a method for forming solder resist and a substrate for a package. The method for forming solder resist including: forming a first solder resist inner region by primarily coating, exposing, and developing a solder resist on a substrate on which an outer PoP pad and an inner chip pad are formed, and removing the solder resist's outer portion on the substrate's outer region and curing the solder resist's inner portion on the substrate's inner region; forming a plugged SR region which does not expose the substrate; changing a surface roughness by performing a desmear process on a surface of the first solder resist inner region in which the plugged SR region is formed; and forming a second solder resist SMD region which covers an edge of the PoP pad, exposing, and developing the solder resist on the substrate after the desmear process is provided.

Abstract: A method of fabricating a package substrate includes: preparing a base substrate; forming a metal material layer surrounding an entire surface of the base substrate; forming sacrificial patterns on partial regions of the base substrate on which the metal material layer is formed; forming pads contacting lateral surfaces of the sacrificial patterns; forming a gold plating layer on upper surfaces of the pads; and removing the sacrificial patterns and removing portions of the metal material layer to form a conductive layer that remains on partial regions so as to contact lower surfaces of the pads.

Abstract: The present invention relates to a method for forming solder resist and a substrate for a package. The method for forming solder resist including: forming a first solder resist inner region by primarily coating, exposing, and developing a solder resist on a substrate on which an outer PoP pad and an inner chip pad are formed, and removing the solder resist's outer portion on the substrate's outer region and curing the solder resist's inner portion on the substrate's inner region; forming a plugged SR region which does not expose the substrate; changing a surface roughness by performing a desmear process on a surface of the first solder resist inner region in which the plugged SR region is formed; and forming a second solder resist SMD region which covers an edge of the PoP pad, exposing, and developing the solder resist on the substrate after the desmear process is provided.

Abstract: A manufacturing method of a printed circuit board having an electro component is disclosed. The method in accordance with an embodiment of the present invention includes: seating an electro component, in which an electrode is formed on an upper side, on an upper side of a bonding sheet; seating an insulator, in which a cavity corresponding to the electro component has been formed, on the upper side of the bonding sheet; laminating a first insulating resin on an upper side of the insulator such that an upper side of the electro component is covered; polishing the first insulating resin such that the electrode is exposed; and forming a first circuit pattern, which is electrically connected to the exposed electrode, on the polished first insulating resin.

Abstract: A manufacturing method of a printed circuit board having an electro component is disclosed. The method in accordance with an embodiment of the present invention includes: seating an electro component, in which an electrode is formed on an upper side, on an upper side of a bonding sheet; seating an insulator, in which a cavity corresponding to the electro component has been formed, on the upper side of the bonding sheet; laminating a first insulating resin on an upper side of the insulator such that an upper side of the electro component is covered; polishing the first insulating resin such that the electrode is exposed; and forming a first circuit pattern, which is electrically connected to the exposed electrode, on the polished first insulating resin.