Patents by Inventor Hyo Seok Lee
Hyo Seok Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967847Abstract: A battery bank control device is provided for setting a power limit value of a battery bank in which a plurality of battery racks (BRs) are connected in parallel. The device includes: a voltage measurement unit measuring a voltage of each BR of the plurality of BRs; a first power limit calculation unit calculating a first power limit value according to a state of charge (SOC) calculated based on the voltage of each BR with respect to each BR; a capacity ratio calculation unit calculating a capacity ratio of each BR based on capacity information of the plurality of BRs; a second power limit calculation unit calculating a second power limit value using the capacity ratio and the first power limit value of each BR; and a battery bank power limit calculation unit calculating a battery bank power limit value using the second power limit value of each BR.Type: GrantFiled: March 16, 2020Date of Patent: April 23, 2024Assignee: LG ENERGY SOLUTION, LTD.Inventors: Sung Yul Yoon, Yoon Joon Choi, Hae In Choi, Jae Sung Im, Hyo Seok Lee
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Publication number: 20240129725Abstract: A service identifying and processing method using a wireless terminal message according to an exemplary embodiment of the present invention includes (a) receiving a wireless terminal message by a first entity which is a mobile device; and (b) expressing, by a first agent which is an information processing application program installed on the first entity, entity information of second entity based on the wireless terminal message and service confirmation information related to service provided by the second entity, through an application screen by the first agent.Type: ApplicationFiled: December 23, 2021Publication date: April 18, 2024Applicant: ESTORM CO., LTD.Inventors: Jong Hyun WOO, Tae Il LEE, Il Jin JUNG, Hee Jun SHIN, Hyung Seok JANG, Min Jae SON, Sang Heon BAEK, Seo Bin PARK, Hyo Sang KWON, Mi Ju KIM, Jung Hoon SONG, Rakhmanov DILSHOD, Dong Hee KIM, Jeon Gjin KIM
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Publication number: 20240120279Abstract: A semiconductor device may include a first film and a second film defining parts of a trench, a plug conductive film, a via, and a wiring in the trench. The trench may include a second sub-trench having a second width below a first sub-trench having a first width. The plug conductive film may extend from a first side of the first film to penetrate a bottom face of the trench. An uppermost face of the plug conducive film may be in the trench. The via may include an insulating liner between the plug conductive film and the first film. The uppermost face of the plug conductive film and at least a part of a side wall of the plug conductive film may be in contact with the wiring. An upper face of the insulating liner may be exposed by a bottom face of the second sub-trench.Type: ApplicationFiled: September 21, 2023Publication date: April 11, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Jeong Hyuk YIM, Wan Don KIM, Hyun Bae LEE, Hyo Seok CHOI, Geun Woo KIM
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Patent number: 11935984Abstract: A quantum dot including a core that includes a first semiconductor nanocrystal including zinc and selenium, and optionally sulfur and/or tellurium, and a shell that includes a second semiconductor nanocrystal including zinc, and at least one of sulfur or selenium is disclosed. The quantum dot has an average particle diameter of greater than or equal to about 13 nm, an emission peak wavelength in a range of about 440 nm to about 470 nm, and a full width at half maximum (FWHM) of an emission wavelength of less than about 25 nm. A method for preparing the quantum dot, a quantum dot-polymer composite including the quantum dot, and an electronic device including the quantum dot is also disclosed.Type: GrantFiled: December 14, 2022Date of Patent: March 19, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yong Seok Han, Sung Woo Kim, Jin A Kim, Tae Hyung Kim, Kun Su Park, Yuho Won, Jeong Hee Lee, Eun Joo Jang, Hyo Sook Jang
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Publication number: 20240075853Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.Type: ApplicationFiled: April 13, 2023Publication date: March 7, 2024Applicants: Hyundai Motor Company, Kia Corporation, DAS CO., LTD, Faurecia Korea, Ltd., Hyundai Transys Inc.Inventors: Sang Soo LEE, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Sang Do PARK, Chan Ho JUNG, Dong Hoon LEE, Hea Yoon KANG, Deok Soo LIM, Seung Pil JANG, Seon Ho KIM, Jong Seok YUN, Hyo Jin KIM, Dong Gyu SHIN, Jin Ho SEO, Young Jun KIM, Taek Jun NAM
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Patent number: 11600593Abstract: Disclosed are a die bonding apparatus, a substrate bonding apparatus, a die bonding method, and a substrate bonding method that are capable of bonding a die to a substrate or bonding substrates together without using a bonding medium such as an adhesion film and a solder bump. The die bonding method includes hydrophilizing a bonding surface of the die, by plasma processing, forming a liquid film on a bonding area of the substrate, by supplying a liquid including water to the bonding area of the substrate, pre-bonding the die to the substrate by bringing the die into contact with the liquid film, and post-bonding one or more dies to the substrate at the same time, by performing heat treatment in a state in which the one or more dies are pre-bonded to the substrate.Type: GrantFiled: October 21, 2019Date of Patent: March 7, 2023Assignee: SEMES CO., LTD.Inventors: Hanglim Lee, Jungsuk Goh, Kwangsup Kim, Doyeon Kim, Minyoung Kim, Jihoon Park, Yungi Kim, Do Heon Kim, Choonghyun Lee, Hyo Seok Lee, Soo Ill Jang
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Publication number: 20220140618Abstract: A battery bank control device is provided for setting a power limit value of a battery bank in which a plurality of battery racks (BRs) are connected in parallel. The device includes: a voltage measurement unit measuring a voltage of each BR of the plurality of BRs; a first power limit calculation unit calculating a first power limit value according to a state of charge (SOC) calculated based on the voltage of each BR with respect to each BR; a capacity ratio calculation unit calculating a capacity ratio of each BR based on capacity information of the plurality of BRs; a second power limit calculation unit calculating a second power limit value using the capacity ratio and the first power limit value of each BR; and a battery bank power limit calculation unit calculating a battery bank power limit value using the second power limit value of each BR.Type: ApplicationFiled: March 16, 2020Publication date: May 5, 2022Applicant: LG ENERGY SOLUTION, LTD.Inventors: Sung Yul YOON, Yoon Joon CHOI, Hae In CHOI, Jae Sung IM, Hyo Seok LEE
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Publication number: 20200126948Abstract: Disclosed are a die bonding apparatus, a substrate bonding apparatus, a die bonding method, and a substrate bonding method that are capable of bonding a die to a substrate or bonding substrates together without using a bonding medium such as an adhesion film and a solder bump. The die bonding method includes hydrophilizing a bonding surface of the die, by plasma processing, forming a liquid film on a bonding area of the substrate, by supplying a liquid including water to the bonding area of the substrate, pre-bonding the die to the substrate by bringing the die into contact with the liquid film, and post-bonding one or more dies to the substrate at the same time, by performing heat treatment in a state in which the one or more dies are pre-bonded to the substrate.Type: ApplicationFiled: October 21, 2019Publication date: April 23, 2020Inventors: HANGLIM LEE, JUNGSUK GOH, KWANGSUP KIM, DOYEON KIM, MINYOUNG KIM, JIHOON PARK, YUNGI KIM, DO HEON KIM, CHOONGHYUN LEE, HYO SEOK LEE, SOO ILL JANG
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Publication number: 20170365881Abstract: A NaNiCl battery and a module using the same are provided. A NaNiCl battery according to the present invention include: a case that forms an exterior shape of the battery; and a beta alumina solid electrolyte (BASE) tube that is provided in the case and having a clover-shaped cross-section, wherein the case has a clover-shaped cross-section like the clover-shaped cross-section of the BASE tube to minimize a space between the case and the BASE tube.Type: ApplicationFiled: May 15, 2015Publication date: December 21, 2017Inventor: Hyo Seok LEE
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Patent number: 9746191Abstract: A system for producing a heat source for heating or electricity, using medium/low-temperature waste heat includes: an absorption-type heat pump (100) supplied with a driving heat source and heat source water to heat a low-temperature heat medium; a regenerator heat exchange unit (210) for supplying a regenerator (110) with a driving heat source using waste heat; an evaporator heat exchange unit (220) for supplying an evaporator with heat source water; a heat medium circulation line (310) for circulating a heat medium; a generation unit (400) branching off from the heat medium circulation line (310) and producing electricity; a heat production unit (500) branching off from the heat medium circulation line (310) and supplying a heat-demanding place with a heat source for heating; and a switching valve unit (600) for controlling the flow of heat medium supplied the generation unit (400) or the heat production unit (500).Type: GrantFiled: May 20, 2014Date of Patent: August 29, 2017Assignee: POSCO ENERGY CO., LTD.Inventors: Min Cheol Kang, Hyo Seok Lee, Jong Kook Seong
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Patent number: 9514980Abstract: A method for fabricating a semiconductor device includes forming an insulation layer over a substrate; forming an open portion in the insulation layer; forming a sacrificial spacer over sidewalls of the open portion; forming, over the sacrificial spacer, a first conductive pattern in a lower section of the open portion; forming an ohmic contact layer over the first conductive pattern; forming an air gap by removing the sacrificial spacer; capping the air gap by forming a barrier layer over the ohmic contact layer; and forming a second conductive pattern over the barrier layer to fill an upper section of the open portion.Type: GrantFiled: August 31, 2015Date of Patent: December 6, 2016Assignee: SK Hynix Inc.Inventors: Hyo-Seok Lee, Seung-Jin Yeom, Sung-Won Lim, Seung-Hee Hong, Nam-Yeal Lee
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Patent number: 9466603Abstract: A semiconductor device includes a plurality of first conductive structures formed over a substrate, second conductive structures each formed between neighboring first conductive structures of the first conductive structures, air gaps each formed between the second conductive structures and the neighboring first conductive structures thereof, third conductive structures each capping a portion of the air gaps, and capping structures each capping the other portion of the air gaps.Type: GrantFiled: October 27, 2015Date of Patent: October 11, 2016Assignee: SK Hynix Inc.Inventors: Seung-Jin Yeom, Sung-Won Lim, Seung-Hee Hong, Hyo-Seok Lee, Nam-Yeal Lee
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Patent number: 9373681Abstract: A method for fabricating a capacitor of a semiconductor device includes forming a mold layer over a substrate, forming a plurality of preliminary openings by selectively etching the mold layer, forming a plurality of openings where each opening is formed to have a given linewidth by forming a sacrificial layer on sidewalls of the preliminary openings, and forming a plurality of storage nodes in the plurality of openings.Type: GrantFiled: December 11, 2015Date of Patent: June 21, 2016Assignee: SK Hynix Inc.Inventors: Sung-Won Lim, Seung-Jin Yeom, Hyo-Seok Lee
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Publication number: 20160172304Abstract: This technology provides a semiconductor device and a method of fabricating the same, which may reduce parasitic capacitance between adjacent conductive structures, The method of fabricating a semiconductor device may include forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers over sidewalis of the contact holes, forming first plugs recessed into the respective contact holes, forming air gaps by removing the sacrificial spacers, forming capping structures capping the air gaps while exposing top surfaces of the first plugs, and forming second plugs over the first plugs.Type: ApplicationFiled: February 12, 2016Publication date: June 16, 2016Inventors: Nam-Yeal LEE, Seung-Jin YEOM, Sung-Won LIM, Seung-Hee HONG, Hyo-Seok LEE, Dong-Seok KIM, Seung-Bum KIM, Se-Jin KIM
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Patent number: 9337202Abstract: A semiconductor device includes a first conductive structure including a first conductive pattern that is formed over a substrate, a second conductive structure formed adjacent to a sidewall of the first conductive structure, and an insulation structure including an air gap that is formed between the first conductive structure and the second conductive structure, wherein the second conductive structure includes a second conductive pattern, an ohmic contact layer that is to formed over the second conductive pattern, and a third conductive pattern that is formed over the ohmic contact layer and is separated from the first conductive pattern through the air gap.Type: GrantFiled: September 17, 2015Date of Patent: May 10, 2016Assignee: SK Hynix Inc.Inventors: Sung-Won Lim, Seung-Jin Yeom, Hyo-Seok Lee
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Publication number: 20160109138Abstract: A system for producing a heat source for heating or electricity, using medium/low-temperature waste heat includes: an absorption-type heat pump (100) supplied with a driving heat source and heat source water to heat a low-temperature heat medium; a regenerator heat exchange unit (210) for supplying a regenerator (110) with a driving heat source using waste heat; an evaporator heat exchange unit (220) for supplying an evaporator with heat source water; a heat medium circulation line (310) for circulating a heat medium; a generation unit (400) branching off from the heat medium circulation line (310) and producing electricity; a heat production unit (500) branching off from the heat medium circulation line (310) and supplying a heat-demanding place with a heat source for heating; and a switching valve unit (600) for controlling the flow of heat medium supplied the generation unit (400) or the heat production unit (500).Type: ApplicationFiled: May 20, 2014Publication date: April 21, 2016Applicant: POSCO ENERGY CO., LTD.Inventors: Min Cheol KANG, Hyo Seok LEE, Jong Kook SEONG
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Publication number: 20160104764Abstract: A method for fabricating a capacitor of a semiconductor device includes forming a mold layer over a substrate, forming a plurality of preliminary openings by selectively etching the mold layer, forming a plurality of openings where each opening is formed to have a given linewidth by forming a sacrificial layer on sidewalls of the preliminary openings, and forming a plurality of storage nodes in the plurality of openings.Type: ApplicationFiled: December 11, 2015Publication date: April 14, 2016Inventors: Sung-Won LIM, Seung-Jin YEOM, Hyo-Seok LEE
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Patent number: 9312210Abstract: A method for fabricating a semiconductor device includes forming, over a substrate, a plurality of first conductive structures which are separated from one another; forming multi-layered dielectric patterns including a first dielectric layer which covers upper ends and both sidewalls of the first conductive structures; removing portions of the first dielectric layer starting from lower end portions of the first conductive structures to define air gaps, and forming second conductive structures which are filled between the first conductive structures.Type: GrantFiled: September 7, 2012Date of Patent: April 12, 2016Assignee: SK Hynix Inc.Inventors: Hyo-Seok Lee, Seung-Jin Yeom
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Patent number: 9293362Abstract: This technology provides a semiconductor device and a method of fabricating the same, which may reduce parasitic capacitance between adjacent conductive structures. The method of fabricating a semiconductor device may include forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers over sidewalls of the contact holes, forming first plugs recessed into the respective contact holes, forming air gaps by removing the sacrificial spacers, forming capping structures capping the air gaps while exposing top surfaces of the first plugs, and forming second plugs over the first plugs.Type: GrantFiled: March 13, 2013Date of Patent: March 22, 2016Assignee: SK Hynix Inc.Inventors: Nam-Yeal Lee, Seung-Jin Yeom, Sung-Won Lim, Seung-Hee Hong, Hyo-Seok Lee, Dong-Seok Kim, Seung-Bum Kim, Sei-Jin Kim
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Publication number: 20160049409Abstract: A semiconductor device includes a plurality of first conductive structures formed over a substrate, second conductive structures each formed between neighboring first conductive structures of the first conductive structures, air gaps each formed between the second conductive structures and the neighboring first conductive structures thereof, third conductive structures each capping a portion of the air gaps, and capping structures each capping the other portion of the air gaps.Type: ApplicationFiled: October 27, 2015Publication date: February 18, 2016Inventors: Seung-Jin YEOM, Sung-Won LIM, Seung-Hee HONG, Hyo-Seok LEE, Nam-Yeal LEE